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2.2.1. Intel® Arria® 10 GT FPGA
The Intel® Arria® 10 FPGAs feature industry-leading programmable logic built on 20 nm process technology that integrates a rich feature set of embedded peripherals, embedded high-speed transceivers, hard memory controllers and IP protocol controllers. Variable-precision digital signal processing (DSP) blocks integrated with hardened floating point (IEEE 754-compliant) arithmetic blocks enable the Intel® Arria® 10 FPGAs to deliver floating point performance of up to 1.5 TFLOPS. Intel® Arria® 10 FPGAs have a comprehensive set of power-saving features. Combined, these features allow developers to build a versatile set of acceleration solutions.
Device | Logic Elements (LE) | Adaptive Logic Modules (ALMs) | Registers | M20K Memory Blocks | M20K Memory (Mb) | MLAB Memory (Mb) | 18 x 19 Multipliers |
---|---|---|---|---|---|---|---|
GT 1150 | 1,150K | 427,200 | 1,708K | 2713 | 53 | 12.7 | 3036 |
When developing the accelerator function for the Intel® FPGA PAC N3000-N , select the 10AT115S1F45E1SG device.