Generic Serial Flash Interface Intel® FPGA IP User Guide

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ID 683419
Date 12/22/2022
Public
Document Table of Contents
Document Table of Contents x
1. Generic Serial Flash Interface Intel® FPGA IP User Guide
1. Generic Serial Flash Interface Intel® FPGA IP User Guide x
1.1. Release Information 1.2. Device Family Support 1.3. Signals 1.4. Parameters 1.5. Register Map 1.6. Using Generic Serial Flash Interface Intel® FPGA IP 1.7. Generic Serial Flash Interface Intel® FPGA IP Reference Design 1.8. Flash Access Using the Generic Serial Flash Interface Intel® FPGA IP 1.9. Intel HAL Driver 1.10. Generic Serial Flash Interface Intel® FPGA IP User Guide Archives 1.11. Document Revision History for the Generic Serial Flash Interface Intel® FPGA IP User Guide
1.6. Using Generic Serial Flash Interface Intel® FPGA IP x
1.6.1. Control Status Register Byte Enable 1.6.2. Memory Operations 1.6.3. Byte Enabling 1.6.4. Constraining the I/O Pins
1.6.3. Byte Enabling x
1.6.3.1. Byte Enabling Supported Patterns
1.7. Generic Serial Flash Interface Intel® FPGA IP Reference Design x
1.7.1. Hardware and Software Requirements 1.7.2. Functional Description 1.7.3. Creating Nios® II Hardware System 1.7.4. Integrating Modules into Intel® Quartus® Prime Project 1.7.5. Programming the .sof File 1.7.6. Building Application Software System using Nios® II Software Build Tools
1.7.2. Functional Description x
1.7.2.1. Reference Design Components 1.7.2.2. Reference Design Application Program
1.7.6. Building Application Software System using Nios® II Software Build Tools x
1.7.6.1. Reference Design Results
1.8. Flash Access Using the Generic Serial Flash Interface Intel® FPGA IP x
1.8.1. Flash Operations that Require Operation Code 1.8.2. Flash Operations to Read Flash Registers 1.8.3. Flash Operations to Write Flash Registers 1.8.4. Flash Operations that Require An Address 1.8.5. Read Memory from the Flash 1.8.6. Program Flash
1.9. Intel HAL Driver x
1.9.1. Driver API
1. Generic Serial Flash Interface Intel® FPGA IP User Guide

1. Generic Serial Flash Interface Intel® FPGA IP User Guide

Updated for:
Intel® Quartus® Prime Design Suite 22.2
IP Version 20.2.1
The Generic Serial Flash Interface Intel® FPGA IP provides access to Serial Peripheral Interface (SPI) flash devices. The Generic Serial Flash Interface IP is a more efficient alternative compared to the ASMI Parallel Intel® FPGA IP and ASMI Parallel II Intel® FPGA IP. The Generic Serial Flash Interface Intel® FPGA IP supports Intel® configuration devices as well as flash from different vendors. Intel® recommends you to use the Generic Serial Flash Interface Intel® FPGA IP for new designs.

You can use the Generic Serial Flash Interface Intel® FPGA IP to write the following data to the flash device:

  • Configuration memory 1—configuration data for Active Serial (AS) configuration scheme.
  • General purpose memory— application-specific data.

The Generic Serial Flash Interface IP supports the following features:

  • Single, dual or quad I/O mode.
  • Direct flash access via the Avalon® memory-mapped slave interface which allows a processor such as Nios® II to directly execute codes from the flash.
  • Up to 3 flash device support ( Intel® Arria® 10 devices, Intel® Cyclone® 10 GX devices, and other FPGA devices with flashes that are connected to the FPGA GPIO pins).
  • IP control register for accessing flash control and status registers.
  • Programmable clock generator with run-time baud rate change for flash device clock.
  • Programmable chip select delay.
  • Read data capturing logic when running with high frequency.
  • FPGA active serial memory interface (ASMI) block atom connection to the active serial (AS) pins or export to FPGA I/O pins.

Section Content
Release Information
Device Family Support
Signals
Parameters
Register Map
Using Generic Serial Flash Interface Intel FPGA IP
Generic Serial Flash Interface Intel FPGA IP Reference Design
Flash Access Using the Generic Serial Flash Interface Intel FPGA IP
Intel HAL Driver
Generic Serial Flash Interface Intel FPGA IP User Guide Archives
Document Revision History for the Generic Serial Flash Interface Intel FPGA IP User Guide

Related Information
1 The supported flash devices for configuration memory are, EPCQ, EPCQ-A, EPCQ-L, and Micron* MT25Q (256Mb to 2Gb) devices.
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