Intel® Acceleration Stack User Guide: Intel® FPGA Programmable Acceleration Card N3000-N/2

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ID 683362
Date 11/01/2021
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. System Requirements 3. Hardware Installation 4. Installing the OPAE Software 5. Identify the Intel® MAX® 10 BMC Version 6. Intel XL710 Driver Installation and Firmware Update 7. Updating the Retimer Firmware 8. OPAE Tools 9. Sample Test: Native Loopback 10. Configuring Ethernet Interfaces 11. Testing Network Loopback Using Data Plane Development Kit (DPDK) 12. Graceful Shutdown 13. Single Event Upset (SEU) 14. Document Revision History for Intel Acceleration Stack User Guide: Intel® FPGA PAC N3000-N/2 A. Troubleshooting B. fpgabist Sample Output
1. About this Document x
1.1. Acronym List
3. Hardware Installation x
3.1. Installing the Intel® FPGA PAC N3000-N/2
4. Installing the OPAE Software x
4.1. Install the Release Package
4.1. Install the Release Package x
4.1.1. Remove Previous OPAE Packages 4.1.2. Install the Acceleration Stack for Runtime 4.1.3. Install the Acceleration Stack for Development 4.1.4. Verify the OPAE Installation
4.1.2. Install the Acceleration Stack for Runtime x
4.1.2.1. For RHEL 4.1.2.2. For CentOS
4.1.2.2. For CentOS x
4.1.2.2.1. Download kernel 4.19 4.1.2.2.2. Build and Install kernel 4.19 4.1.2.2.3. Install OPAE in kernel 4.19
5. Identify the Intel® MAX® 10 BMC Version x
5.1. FPGA Factory Image Overview
6. Intel XL710 Driver Installation and Firmware Update x
6.1. Installing the Intel XL710 Driver 6.2. Updating the Intel XL710 Firmware
8. OPAE Tools x
8.1. Using fpgasupdate 8.2. Using fpgainfo 8.3. Test PCIe and External Memories with fpgabist 8.4. Test Network Loopback using fpgadiag
10. Configuring Ethernet Interfaces x
10.1. Modifying the Interface Maximum Transmission Unit (MTU) Size 10.2. Setting Forward Error Correction (FEC) Mode 10.3. Ethernet Pause Flow Control 10.4. Get Link Statistics 10.5. Ethernet Link Status
11. Testing Network Loopback Using Data Plane Development Kit (DPDK) x
11.1. Test Using an External Traffic Generator 11.2. Revert Back from DPDK to OPAE
12. Graceful Shutdown x
12.1. Using OPAE
13. Single Event Upset (SEU) x
13.1. OPAE Handling of SEU
A. Troubleshooting x
A.1. If OPAE installation verification fails, how to install OPAE manually?
B. fpgabist Sample Output x
B.1. For 4x25G Configuration B.2. For 2x2x25G Configuration
1. About this Document
2. System Requirements
3. Hardware Installation
4. Installing the OPAE Software
5. Identify the Intel® MAX® 10 BMC Version
6. Intel XL710 Driver Installation and Firmware Update
7. Updating the Retimer Firmware
8. OPAE Tools
9. Sample Test: Native Loopback
10. Configuring Ethernet Interfaces
11. Testing Network Loopback Using Data Plane Development Kit (DPDK)
12. Graceful Shutdown
13. Single Event Upset (SEU)
14. Document Revision History for Intel Acceleration Stack User Guide: Intel® FPGA PAC N3000-N/2
A. Troubleshooting
B. fpgabist Sample Output

8.2. Using fpgainfo

Command synopsis: fpgainfo <command> [<args>]
Table 6.   fpgainfo Commands
command args (optional) Description
  --help, -h Prints help information and exit
  --bus, -B Provides PCIe bus number of resource
  --device, -D Provides PCIe device number of resource
  --function, -F Provides PCIe function number of resource
errors fme --clear, -c Provides/clear errors of FME
errors port --clear, -c Provides/clear errors of port
errors all --clear, -c Provides/clear errors of both FME and port
power   Provides total power in watts that the FPGA hardware consumes
temp   Provides FPGA temperature values in degrees Celsius
port   Provides information about the port
fme   Provides information about the FME
bmc   Provides BMC sensors information
mac   Provides information about MAC ROM connected to FPGA
phy -G <group> Provides information about Ethernet PHYs in FPGA.

<group> can be 0, 1, all.

security   Provides information about whether the Intel® FPGA PAC has root entry hash for programmed FIM/SR or whether the CSK ID for SR/BMC is cancelled.

fpgainfo fme 

$ sudo fpgainfo fme
Sample output based on 4x25G: 
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** FME ******//
Object Id                     : 0xED00000
PCIe s:b:d.f                  : 0000:3e:00.0
Device Id                     : 0x0b30
Numa Node                     : 0
Ports Num                     : 01
Bitstream Id                  : 0x23000110010310
Bitstream Version             : 0.2.3
Pr Interface Id               : f3c99413-5081-4aad-bced-07eb84a6d0bb
Boot Page                     : user

fpgainfo bmc 

$ sudo fpgainfo bmc
Sample output based on 4x25G: 
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** BMC SENSORS ******//
Object Id                     : 0xED00000
PCIe s:b:d.f                  : 0000:3e:00.0
Device Id                     : 0x0b30
Numa Node                     : 0
Ports Num                     : 01
Bitstream Id                  : 0x23000110010310
Bitstream Version             : 0.2.3
Pr Interface Id               : f3c99413-5081-4aad-bced-07eb84a6d0bb
( 1) Board Power                  : 73.07 Watts
( 2) 12V Backplane Current        : 3.26 Amps
( 3) 12V Backplane Voltage        : 12.11 Volts
( 4) 1.2V Voltage                 : 1.19 Volts
( 6) 1.8V Voltage                 : 1.79 Volts
( 8) 3.3V Voltage                 : 3.24 Volts
(10) FPGA Core Voltage            : 0.90 Volts
(11) FPGA Core Current            : 17.12 Amps
(12) FPGA Core Temperature        : 68.50 Celsius
(13) Board Temperature            : 45.00 Celsius
(14) QSFP A Voltage               : N/A
(15) QSFP A Temperature           : N/A
(24) 12V AUX Current              : 2.77 Amps
(25) 12V AUX Voltage              : 12.12 Volts
(37) QSFP B Voltage               : N/A
(38) QSFP B Temperature           : N/A
(44) Retimer A Core Temperature   : 74.00 Celsius
(45) Retimer A Serdes Temperature : 75.00 Celsius
(46) Retimer B Core Temperature   : 0.00 Celsius
(47) Retimer B Serdes Temperature : 0.00 Celsius
Note: The BMC supports QSFP modules compliant with SFF8436 or SFF8636 standard. If the QSFP module does not support Digital Diagnostics Monitoring, the output for QSFP voltage, temperature, temperature high fatal, and temperature high warning is N/A.

fpgainfo phy 

$ sudo fpgainfo phy -B 0xb2
Note: For 4x25G configuration, only Retimer A is functional in the Intel® FPGA PAC N3000-N/2.
Sample output based on 4x25G: 
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** PHY ******//
Object Id                     : 0xED00001
PCIe s:b:d.f                  : 0000:8a:00.0
Device Id                     : 0x0b30
Numa Node                     : 1
Ports Num                     : 01
Bitstream Id                  : 0x23000110010310
Bitstream Version             : 0.2.3
Pr Interface Id               : f3c99413-5081-4aad-bced-07eb84a6d0bb
//****** PHY GROUP 0 ******//
Direction                     : Line side
Speed                         : 25 Gbps
Number of PHYs                : 4
//****** PHY GROUP 1 ******//
Direction                     : Host side
Speed                         : 40 Gbps
Number of PHYs                : 4
//****** Intel C827 Retimer ******//
Port0 25G                     : Up
Port1 25G                     : Up
Port2 25G                     : Up
Port3 25G                     : Up
Retimer A Version             : 101c.1064
Retimer B Version             : 0000.0000

fpgainfo security 

$ sudo fpgainfo security
Sample output based on 4x25G: 
Board Management Controller, MAX10 NIOS FW version D.2.1.24
Board Management Controller, MAX10 Build version D.2.0.7
//****** SECURITY ******//
Object Id                     : 0xED00000
PCIe s:b:d.f                  : 0000:3e:00.0
Device Id                     : 0x0b30
Numa Node                     : 0
Ports Num                     : 01
Bitstream Id                  : 0x23000110010310
Bitstream Version             : 0.2.3
Pr Interface Id               : f3c99413-5081-4aad-bced-07eb84a6d0bb
FIM/SR root entry hash        : hash not programmed
BMC root entry hash           : 0xec0f42d3af138e3eca7141107f7fed5f7c13846fadbba884e51ad26bf36a3d21
PR root entry hash            : hash not programmed
SMB parameters update counter : 0
User flash update counter     : 2
FIM/SR CSK IDs canceled       : None
BMC CSK IDs canceled          : None
AFU CSK IDs canceled          : None
Note: BMC root entry hash and BMC CSK ID cancellation bitstreams are provided by Intel.

PR root entry hash and AFU CSK ID canceled parameter outputs are not applicable to Intel® FPGA PAC N3000-N/2. For more information about the fpgainfo security command, refer to the Accessing Intel FPGA PAC N3000 Version and Authentication Information section of Security User Guide: Intel FPGA Programmable Acceleration Card N3000 Variants

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