AN 770: Partially Reconfiguring a Design on Intel® Arria® 10 SoC Development Board

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ID 683345
Date 11/06/2017
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Document Table of Contents
Document Table of Contents x
Partially Reconfiguring a Design on Intel® Arria® 10 SoC Development Board
Partially Reconfiguring a Design on Intel® Arria® 10 SoC Development Board x
Reference Design Requirements Reference Design Overview Reference Design Files Reference Design Walkthrough Document Revision History
Reference Design Walkthrough x
Step 1: Getting Started Step 2: Creating a Design Partition Step 3: Allocating Placement and Routing Region for a PR Partition Step 4: Adding the Intel® Arria® 10 Partial Reconfiguration Controller IP Core Step 5: Defining Personas Step 6: Creating Revisions Step 7: Generating the Partial Reconfiguration Flow Script Step 8: Running the Partial Reconfiguration Flow Script Step 9: Programming the Board Modifying an Existing Persona Adding a New Persona to the Design
Step 4: Adding the Intel® Arria® 10 Partial Reconfiguration Controller IP Core x
Updating the Top-Level Design
Step 6: Creating Revisions x
Creating Implementation Revisions Creating Synthesis-Only Revisions Specifying Revision Type
Partially Reconfiguring a Design on Intel® Arria® 10 SoC Development Board

Step 6: Creating Revisions

The PR design flow uses the project revisions feature in the Intel® Quartus® Prime software. Your initial design is the base revision, where you define the static region boundaries and reconfigurable regions on the FPGA. From the base revision, you create multiple revisions. These revisions contain the different implementations for the PR regions. However, all PR implementation revisions use the same top-level placement and routing results from the base revision.

To compile a PR design, you must create a PR implementation revision and synthesis revision for each persona. In this reference design, the three personas contain a base revision, three separate synthesis revisions, and three separate implementation revisions:
Table 3.  Revisions for the Three Personas
Synthesis Revision Implementation Revision
blinking_led_default blinking_led_pr_alpha
blinking_led_slow blinking_led_pr_bravo
blinking_led_empty blinking_led_pr_charlie
Level Two Title