OpenCL* Quick Start User Guide: Intel FPGA Programmable Acceleration Card D5005

ID 683324
Date 7/21/2020

5.2. Running Vector Add

  1. Extract example:
    cd $OPAE_PLATFORM_ROOT/opencl
    mkdir exm_opencl_vector_add_x64_linux
    cd exm_opencl_vector_add_x64_linux
    tar xzvf ../exm_opencl_vector_add_x64_linux.tgz
  2. Build example:
    cd vector_add
  3. Copy precompiled OpenCL* kernel to bin folder:
    cp $OPAE_PLATFORM_ROOT/opencl/vector_add.aocx ./bin
  4. Program the aocx file:
    aocl program acl0 ./bin/vector_add.aocx
    Note: This step is not necessary for non SR-IOV enabled system as OpenCL* by default performs partial reconfiguration to program the new kernel on FPGA. The aocx file in the release OpenCL* folder is unsigned. If you are using Intel® FPGA PAC features and programming a signed aocx file to the device, ensure that you copy the same file in the bin before running. Also, make sure that you rename the file to vector_add.aocx because the hose code looks for the specific name of the kernel.
    Example sample output:
    Running program from /home/<username>/intelrtestack/d5005_ias_2_0_1_b237/opencl/opencl_bsp/linux64/libexec
    Program succeed.
  5. Run example:
    Example sample output:
    Initializing OpenCL
    Platform: Intel(R) FPGA SDK for OpenCL(TM)
    Using 2 device(s)
      pac_s10_dc : Intel PAC Platform (pac_ee00001)
      pac_s10_dc : Intel PAC Platform (pac_ee00000)
    Using AOCX: vector_add.aocx
    Launching for device 0 (500000 elements)
    Launching for device 1 (500000 elements)
    Time: 6.814 ms
    Kernel time (device 0): 1.817 ms
    Kernel time (device 1): 2.094 ms
    Verification: PASS

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