Intel® FPGA Programmable Acceleration Card N3000 Data Sheet

ID 683260
Date 6/30/2021
Public

6. Intel® Provided FPGA Image

The Intel® Arria® 10 FPGA factory image includes the following Intellectual Property (IP) to support in the development of function accelerators:
  • The PCIe IP core
  • The Core Cache Interface protocol (CCI-P) fabric
  • DDR4 memory interface controller IP
  • QDR4 memory interface controller IP
  • 10 or 25 GbE physical interface and MACs with pass-through connectivity between Intel® Ethernet Connection C827 Retimer and Intel® Ethernet Controller XL710-BM2
  • FPGA Management Engine (FME)
  • Nios® core to configure the Intel Ethernet Connection C827 Retimers
Specific features of the factory image are listed in the following document:
  • Intel Acceleration Stack User Guide for Intel® FPGA Programmable Acceleration Card N3000.

The 1024 Mb FPGA flash memory stores two FPGA images. One image is the user image and the other image is a backup factory image. The factory image is only loaded when the user image fails to load from flash to the FPGA.

The Intel® FPGA PAC N3000 does not support partial reconfiguration. The FPGA image is a full-device bit stream that is loaded when the system is powered up or after you enter a remote system update command.