Intel® FPGA Programmable Acceleration Card N3000 Data Sheet

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ID 683260
Date 6/30/2021
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. System Compatibility 4. Mechanical Information 5. Thermal Specifications 6. Intel® Provided FPGA Image A. References B. Safety and Regulatory Information C. Document Revision History for Intel® FPGA Programmable Acceleration Card N3000 Data Sheet
2. Overview x
2.1. Intel® FPGA PAC N3000 Block Diagram 2.2. Overview of Product Features 2.3. PCIe Overview 2.4. Board Management Controller Overview
2.2. Overview of Product Features x
2.2.1. Intel® Arria® 10 GT FPGA 2.2.2. Intel® Ethernet Controller XL710-BM2 Network Interface Controller 2.2.3. On-Board Memory 2.2.4. Software and Firmware 2.2.5. Power 2.2.6. Network Interface
2.2.6. Network Interface x
2.2.6.1. Intel® Ethernet Connection C827 Retimer
2.4. Board Management Controller Overview x
2.4.1. Field Replaceable Unit Identification (FRUID) EEPROM
5. Thermal Specifications x
5.1. Cooling Requirements
B. Safety and Regulatory Information x
B.1. Regulatory Compliance
1. Introduction
2. Overview
3. System Compatibility
4. Mechanical Information
5. Thermal Specifications
6. Intel® Provided FPGA Image
A. References
B. Safety and Regulatory Information
C. Document Revision History for Intel® FPGA Programmable Acceleration Card N3000 Data Sheet

2. Overview

This chapter provides an overview of the programmable acceleration card and describes the board architecture and its components.

Section Content
Intel FPGA PAC N3000 Block Diagram
Overview of Product Features
PCIe Overview
Board Management Controller Overview

Level Two Title