Intel® FPGA Programmable Acceleration Card N3000 Data Sheet

ID 683260
Date 6/30/2021
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2.3. PCIe Overview

The communication link between the Intel® FPGA PAC N3000 and a local host server is through a PCIe Gen3 x16 Edge Connector. The card contains a PEX8747 PCIe switch with one upstream port (x16) on the edge connector, and four downstream ports (all x8) connected to Intel® Arria® 10 FPGA (two x8 ports) and one x8 port per Intel® Ethernet Controller XL710 device.

The Intel® FPGA PAC N3000 supports PCIe* Gen3 speed. The PEX8747 PCIe switch links between Intel Arria10 and XL710 run at Gen3 speed, whereas the upstream port on the edge connector runs the highest speed supported by the host up to Gen3 speed.

The PCIe* edge connector SMBus is connected to the Intel® MAX® 10 BMC.

PCIe* Device Description PCIe* Vendor ID (VID) PCIe* Device ID (DID) PCIe* Sub-Vendor ID (SVID) PCIe* Sub-Device ID (SDID) Class
Intel® Arria® 10 FPGA PCIe* Management Interface 0x8086 0x0B30 0x8086 0000 0x1200
Intel® Arria® 10 FPGA Secondary PCIe* Interface 0x0B32 0x1200
XL710 Ethernet NIC (10G) 0x0CF8 0x0200
XL710 Ethernet NIC (25G) 0x0D58 0x0200