O-RAN Intel® FPGA IP Design Example User Guide

ID 683218
Date 9/14/2021
Public

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2.2.1. Simulating the O-RAN Design Example for Intel Agilex F-Tile Devices

When targeting Intel Agilex F-tile devices, the design example supports VCS simulations only.
  1. Turn on Example Design > Files Types Generated > Simulation.
  2. Change the directory to <simulation design example> /simulation/quartus.
  3. Run these two commands:
    quartus_ipgenerate --run_default_mode_op oran_ed -c oran_ed
    quartus_tlg oran_ed..
  4. Change the directory to <simulation design example> /simulation/setup_scripts.
  5. Run this command: ip-setup-simulation --use-quartus-top-names --quartus-project=../quartus/oran_ed.qpf.
  6. Change the directory to <simulation design example> /simulation/setup_scripts/synopsys/vcs.
  7. Run this command: sh run_vcs.sh.