AN 836: RapidIO II Reference Design for Avalon-ST Pass-Through Interface

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ID 683197
Date 12/18/2017
Public
Document Table of Contents
Document Table of Contents x
1. RapidIO II Reference Design for Avalon® -ST Pass-Through Interface
1. RapidIO II Reference Design for Avalon® -ST Pass-Through Interface x
1.1. Introduction 1.2. Requirements 1.3. Downloading and Installing the Reference Design 1.4. Walkthrough 1.5. Document Revision History for RapidIO II Reference Design for the Avalon® -ST Pass-Through Interface
1.2. Requirements x
1.2.1. Software Requirements 1.2.2. Hardware Requirements 1.2.3. Features of the RapidIO II Reference Design for the Avalon® -ST Pass-Through Interface
1.4. Walkthrough x
1.4.1. Hardware Setup 1.4.2. Programming the FPGA 1.4.3. Running the Design 1.4.4. System Console User Interface Commands 1.4.5. Register Address Map
1.4.2. Programming the FPGA x
1.4.2.1. Using a Nios® II Command Shell 1.4.2.2. Using the Programmer
1. RapidIO II Reference Design for Avalon® -ST Pass-Through Interface

1.4.3. Running the Design

When the board is set up and the FPGA is programmed, you can start running the design:
  1. Invoke the system console. This can be done at the Nios® II command shell or from the Intel® Quartus® Prime software GUI.
  2. In the command window, change your directory to system_console by typing the following command : 
    cd system_console
  3. Execute the following commands at the system console: 
    source main_run.tcl
cfig
link
cstats
stats
start
stats
  4. The traffic generator module starts to generate RapidIO NWRITE transactions with a default payload of 64 bytes. The default number of NWRITE transactions is 0xFFFFFFFF (4,294,967,295 decimal). You can stop the traffic generator by entering the stop command. The generated RapidIO transactions are being received at the traffic checker module since all the traffic is looped back through the FMC Loopback Card.
    You can view the transactions transmitted and received counts as well as other statistics by entering the link and the stats commands at the system console.
    Figure 7. Link Command Execution
    Figure 8. Stats Command Execution
  5. Use Signal Tap to view the packet exchange. This reference design includes the Signal Tap file srio2.stp which monitors the gen_tx and the gen_rx interfaces of the RapidIO Avalon® -ST pass-through interface. The figures below shows the Signal Tap activity.
    Figure 9. auto_signaltap_1
    Figure 10. auto_signaltap_2
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