ID 683179
Date 7/13/2021
Public

## 3.3.1. Aggregate Bandwidth

The bit rate specifies the rate of data transmission on a single lane.

In a multi-lane configuration, the total available bandwidth is the single-lane bit rate multiplied by the number of lanes. For example, calculate the bandwidth for a variation using 8B/10B encoding and an internal data path of 8 bits (transfer size is equal to 1), and the number of lanes is equal to 4.

In this mode, the input data bus into the processor portion is 36 bits wide (32 bits of raw data and 4 bits of control information). With the additional bits per byte (due to 8B/10B encoding) for control information, the data bus size being transmitted from the byte alignment logic into the protocol-processing portion of the IP core is equal to the number of lanes × 10 (due to 8B/10B encoding). Thus for 4 lanes, the data bus size is equal to 40 bits (4×10 =40).

For example, a 32-byte packet. Count the number of 32-bit wide rows that are transmitted into the protocol-processing portion. The result is 8 rows (32 bytes/4 bytes) of solid data, plus one additional row for the start-of-packet marker row and the end-of-packet marker row (no CRC) which equals 9 rows of 40 bits.

• For a 32-byte packet, given a link rate of 800 Mbps × 4 = 3.2 Gbps, the transfer equals:
• data bits: 256
• bits sent: 360
• 256/360 × 3.2 = 2.276 Gbps
• For a 64-byte packet, given a link rate of 800 Mbps × 4 = 3.2 Gbps, the transfer equals:
• data bits: 512
• bits sent: 680
• 512/680 × 3.2 = 2.409 Gbps
• For a 128-byte packet, given a link rate of 800 Mbps × 4 = 3.2 Gbps, the transfer equals:
• data bits: 1, 024
• bits sent: 1, 320
• 1,024/1, 320 × 3.2 = 2.482 Gbps