External Memory Interfaces Intel® Agilex™ 7 F-Series and I-Series FPGA IP Design Example User Guide

ID 683162
Date 4/03/2023
Document Table of Contents

2.6. Simulating External Memory Interface IP With ModelSim

This procedure shows how to simulate the EMIF design example.

  1. Launch the Mentor Graphics* ModelSim software and select File > Change Directory. Navigate to the sim/ed_sim/mentor directory within the generated design example folder.
  2. Verify that the Transcript window is displayed at the bottom of the screen. If the Transcript window is not visible, display it by clicking View > Transcript.
  3. In the Transcript window, run source msim_setup.tcl.
  4. After source msim_setup.tcl finishes running, run ld_debug in the Transcript window.
  5. After ld_debug finishes running, verify that the Objects window is displayed. If the Objects window is not visible, display it by clicking View > Objects.
  6. In the Objects window, select the signals that you want to simulate by right-clicking and selecting Add Wave.
  7. After you finish selecting the signals for simulation, execute run -all in the Transcript window. The simulation runs until it is completed.
  8. If the simulation is not visible, click View > Wave.