Intel® High Level Synthesis Compiler Pro Edition: Best Practices Guide
ID
683152
Date
1/23/2025
Public
1. Discontinuation of the Intel® HLS Compiler
2. Intel® HLS Compiler Pro Edition Best Practices Guide
3. Best Practices for Coding and Compiling Your Component
4. FPGA Concepts
5. Interface Best Practices
6. Loop Best Practices
7. fMAX Bottleneck Best Practices
8. Memory Architecture Best Practices
9. System of Tasks Best Practices
10. Datatype Best Practices
11. Advanced Troubleshooting
A. Intel® HLS Compiler Pro Edition Best Practices Guide Archives
B. Document Revision History for Intel® HLS Compiler Pro Edition Best Practices Guide
6.1. Reuse Hardware By Calling It In a Loop
6.2. Parallelize Loops
6.3. Construct Well-Formed Loops
6.4. Minimize Loop-Carried Dependencies
6.5. Avoid Complex Loop-Exit Conditions
6.6. Convert Nested Loops into a Single Loop
6.7. Place if-Statements in the Lowest Possible Scope in a Loop Nest
6.8. Declare Variables in the Deepest Scope Possible
6.9. Raise Loop II to Increase fMAX
6.10. Control Loop Interleaving
4.3.2.3. Handshaking Between Clusters
By default, the handshaking protocol between clusters is a simple stall/valid protocol. Data from the upstream cluster is consumed when the stall signal is low and the valid signal is high.
Figure 8. Handshaking Between Clusters
Hyper-Optimized Handshaking
If the distance across the FPGA between these two clusters is large, handshaking may become the critical path that affects peak fMAX. in the design
To improve these cases, the Intel® HLS Compiler can add pipelining registers to the stall/valid protocol to ease the critical path and improve fMAX. This enhanced handshaking protocol is called hyper-optimized handshaking.
Figure 9. Hyper-Optimized Handshaking Data Flow
The following timing diagram illustrates an example of upstream cluster 1 and downstream cluster 2 with two pipelining registers inserted in-between:
Figure 10. Hyper-Optimized Handshaking
Restriction: Hyper-optimized handshaking is currently available only for the Intel Agilex® 7 and Stratix® 10 device families.