Intel® High Level Synthesis Compiler Pro Edition: Best Practices Guide

ID 683152
Date 3/28/2022
Public

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7.2. Example: Overriding a Banked Memory Architecture

Using memory attributes in various combinations in your code allows you to override the memory architecture that the Intel® HLS Compiler Pro Edition infers for your component.

The following code examples demonstrate how you can use the following memory attributes to override banked memory to conserve memory blocks on your FPGA:

  • hls_bankwidth(N)
  • hls_numbanks(N)
  • hls_singlepump
  • hls_doublepump

The original code creates two banks of single-pumped on-chip memory blocks that are 16 bits wide:

component unsigned short mem_banked(unsigned short raddr,
                                    unsigned short waddr,
                                    unsigned short wdata){
    unsigned short data[1024];
    
    data[2*waddr] = wdata;
    data[2*waddr + 9] = wdata +1;

    unsigned short rdata = data[2*raddr] + data[2*raddr + 9];

    return rdata;
}

To save banked memory, you can implement one bank of double-pumped 32-bit-wide on-chip memory block by adding the following attributes before the declaration of data[1024]. These attributes fold the two half-used memory banks into one fully-used memory bank that is double pumped, so that it can be accessed as quickly as the two half-used memory banks.

hls_bankwidth(2) hls_numbanks(1)
hls_doublepump
unsigned short data[1024];

Alternatively, you can avoid the double-clock requirement of the double-pumped memory by implementing one bank of single-pumped on-chip memory block by adding the following attributes before the declaration of data[1024]. However, in this example, these attributes add stallable arbitration to your component memories, which hurts your component performance.

hls_bankwidth(2) hls_numbanks(1)
hls_singlepump
unsigned short data[1024];

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