F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 1/26/2024
Public
Document Table of Contents
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1. Acronyms

Updated for:
Intel® Quartus® Prime Design Suite 23.4
IP Version 11.0.0
Table 1.  Acronyms for the F-Tile Avalon-ST IP for PCI Express User Guide
Term Definition
ACS Access Control Service
AIB Altera Interface Bus (MAIB – Master Die). Used interchangeably with EMIB
ARI Alternative Routing ID
ASPM Active State Power Management
ATS Address Translation Services
Avalon-MM or AVMM Avalon Memory Mapped Interface
Avalon-ST or AVST Avalon Streaming Interface
BIST Built-In Self Test
EMIB Embedded Multi-Die Interconnect Bridge
FGT F-Tile General Purpose Transceiver (FGT)
HIP Hard IP
LTSSM Link Training and Status State Machine
PBA Pending Bit Array
PCIe PCI Express Bus Technology
PCS Physical Coding Sublayer
PMA Physical Medium Attachment
PIPE PHY Interface for PCIe
PLD Programmable Logic Device
PLL Phase Locked Loop
PRS Page Request Services
PTM Precision Time Measurement (PCIe)
SRIS Separate Reference Clock with Independent Spread
TLP Transaction Layer Packet