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1. About the JESD204C Intel FPGA IP User Guide
2. Overview of the JESD204C Intel FPGA IP
3. Functional Description
4. Getting Started
5. Designing with the JESD204C Intel® FPGA IP
6. JESD204C Intel® FPGA IP Parameters
7. Interface Signals
8. Control and Status Registers
9. JESD204C Intel® FPGA IP User Guide Archives
10. Document Revision History for the JESD204C Intel® FPGA IP User Guide
4.1. Installing and Licensing Intel® FPGA IP Cores
4.2. Intel® FPGA IP Evaluation Mode
4.3. IP Catalog and Parameter Editor
4.4. JESD204C IP Component Files
4.5. Creating a New Intel® Quartus® Prime Project
4.6. Parameterizing and Generating the IP
4.7. Compiling the JESD204C IP Design
4.8. Programming an FPGA Device
4.8. Programming an FPGA Device
After successfully compiling your design, program the targeted Intel® device with the Intel® Quartus® Prime Programmer and verify the design in hardware. For instructions on programming the FPGA device, refer to the Intel Quartus Prime Pro Edition User Guide: Programmer.