AN 425: Using the Command-Line Jam™ STAPL Solution for Device Programming

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ID 683089
Date 10/14/2024
Public
Document Table of Contents
Document Table of Contents x
1. Using the Command-Line Jam™ STAPL Solution for Device Programming
1. Using the Command-Line Jam™ STAPL Solution for Device Programming x
1.1. Jam™ STAPL Players 1.2. Jam™ STAPL Files 1.3. Using the Jam™ STAPL Player 1.4. Using the quartus_jli Command-Line Executable 1.5. Using Jam™ STAPL for ISP with an Embedded Processor 1.6. Board Layout 1.7. Embedded Jam™ STAPL Players 1.8. Updating Devices Using Jam 1.9. Document Revision History for AN 425: Using the Command-Line Jam™ STAPL Solution for Device Programming
1.1. Jam™ STAPL Players x
1.1.1. Differences Between the Jam™ STAPL Players and quartus_jli
1.2. Jam™ STAPL Files x
1.2.1. Generating Byte-Code Jam™ STAPL Files 1.2.2. List of Supported .jam and .jbc Actions and Procedures 1.2.3. Jam™ STAPL Player and quartus_jli Exit Codes
1.2.2. List of Supported .jam and .jbc Actions and Procedures x
1.2.2.1. Definitions of .jam and .jbc Action and Procedure Statements
1.4. Using the quartus_jli Command-Line Executable x
1.4.1. Command-line Syntax of quartus_jli Command-Line Executable
1.5. Using Jam™ STAPL for ISP with an Embedded Processor x
1.5.1. Methods to Connect the JTAG Chain to the Embedded Processor
1.5.1. Methods to Connect the JTAG Chain to the Embedded Processor x
1.5.1.1. Connecting the Embedded Processor Directly to the JTAG Chain 1.5.1.2. Connecting the JTAG Chain to an Existing Bus Using an Interface Device
1.6. Board Layout x
1.6.1. Treat the TCK Signal Trace as a Clock Tree 1.6.2. Use a Pull-Down Resistor on the TCK Signal 1.6.3. Make the JTAG Signal Traces as Short as Possible 1.6.4. Add External Resistors to Pull the Outputs to a Defined Logic Level
1.7. Embedded Jam™ STAPL Players x
1.7.1. The Jam™ STAPL Byte-Code Player 1.7.2. Steps to Port the Jam™ STAPL Byte-Code Player 1.7.3. Jam™ STAPL Byte-Code Player Memory Usage
1.7.2. Steps to Port the Jam™ STAPL Byte-Code Player x
1.7.2.1. Step 1: Set the Preprocessor Statements to Exclude Extraneous Code 1.7.2.2. Step 2: Map the JTAG Signals to the Hardware Pins 1.7.2.3. Step 3: Handle Text Messages from jbi_export() 1.7.2.4. Step 4: Customize Delay Calibration
1.7.3. Jam™ STAPL Byte-Code Player Memory Usage x
1.7.3.1. Estimating ROM Usage 1.7.3.2. Estimating Dynamic Memory Usage 1.7.3.3. Example of Calculating DRAM Required by Jam™ STAPL Byte-Code Player
1.7.3.1. Estimating ROM Usage x
1.7.3.1.1. Algorithm File Size Constants 1.7.3.1.2. Compressed and Uncompressed Data Size Constants 1.7.3.1.3. Jam™ STAPL Byte-Code Player Size
1.8. Updating Devices Using Jam x
1.8.1. jbi_execute Parameters 1.8.2. Running the Jam™ STAPL Byte-Code Player
1. Using the Command-Line Jam™ STAPL Solution for Device Programming

1.7.3.1.1. Algorithm File Size Constants

Table 8.  Algorithm File Size Constants Targeting a Single Altera® Device Family
Device Typical .jbc Algorithm Size (KB)
Stratix® device family 15
Cyclone® device family 15
Arria® device family 15
Mercury™ 15
EPC16 24
EPC8 24
EPC4 24
EPC2 19
MAX® 7000AE 21
MAX 7000 21
MAX 3000A 21
MAX 9000 21
MAX 7000S 25
MAX 7000A 25
MAX 7000B 17
MAX II 24.3
MAX V 24.3
MAX 10 24.32
Table 9.  Algorithm File Size Constants Targeting Multiple Altera® Device FamiliesThis table lists the algorithm file size constants for possible combinations of Altera device families that support the Jam language.
Devices Typical .jbc Algorithm Size (KB)
FLEX® 10K, MAX 7000A, MAX 7000S, MAX 7000AE3 31
FLEX 10K, MAX 9000, MAX 7000A, MAX 7000S, MAX 7000AE 45
MAX 7000S, MAX 7000A, MAX 7000AE 31
MAX 9000, MAX 7000A, MAX 7000S, MAX 7000AE 45
2 Size is preliminary.
3 If you are configuring FLEX or APEX™ devices, and programming MAX 9000 and MAX 7000 devices, the FLEX or APEX algorithm adds negligible memory.
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