4.1.3. TX CRC
The MAC adds the CRC value to the END CW by asserting the tx_avs_endofpacket signal. In the BASIC mode, only the ALIGN CW paired with END CW contains a valid CRC field.
The TX CRC block interfaces with the TX Control Word Insertion and TX MII Encode block. The TX CRC block computes the CRC value for 64-bit value per-cycle data starting from the START CW up to the END CW.
You can assert the crc_error_inject signal to intentionally corrupt data in a specific lane to create CRC errors.