7.1. F-Tile Serial Lite IV Intel® FPGA IP Soft CSR
The F-Tile Serial Lite IV Intel® FPGA IP Soft CSR is only enabled for PAM4 mode when the 32-bit Soft CWBIN counters is enabled.
The details for the soft CSR are as follows:
|Register Name||Address||Register Type||Bit Size|
|Cwbin Control Register/Reset||0x100||Read/Write||1|
|Cwbin0 A Counter||0x101||Read-Only||32|
|Cwbin1 A Counter||0x102||Read-Only||32|
|Cwbin2 A Counter||0x103||Read-Only||32|
|Cwbin3 A Counter||0x104||Read-Only||32|
|Cwbin0 B Counter||0x105||Read-Only||32|
|Cwbin1 B Counter||0x106||Read-Only||32|
|Cwbin2 B Counter||0x107||Read-Only||32|
|Cwbin3 B Counter||0x108||Read-Only||32|
For Cwbin Control Register/Reset, Channel 0’s cwbin reset would be the only reset available as this would reset all the cwbin counters simultaneously. To access Channel N’s soft CSR, you need to add in the appropriate lane offset for reconfig_sl_address.