50G Interlaken Design Example User Guide

ID 683029
Date 10/04/2021

A newer version of this document is available. Customers should click here to go to the newest version.

1.5. Compiling and Testing the Design

To compile and run a demonstration test on the hardware example design, follow these steps:
  1. Ensure hardware example design generation is complete.
  2. Open the Intel® Quartus® Prime project <user-specified location>/example_design_a10/quartus/example_design.qpf, where <user-specified location> is the directory location you specified when you generated the testbench and hardware example design.
  3. On the Processing menu, click Start Compilation.
  4. After successful compilation, a .sof file will be generated in your specified directory. Follow these steps to program the hardware example design on the Intel® Arria® 10:
    1. On the Tools menu, click Programmer.
    2. In the Programmer, click Hardware Setup.
    3. Select a programming device.
    4. Select and add the Intel® Arria® 10 GX Transceiver Signal Integrity Development Kit to which your Intel® Quartus® Prime session can connect.
    5. Ensure that Mode is set to JTAG.
    6. Select the Arria 10 device and click Add Device. The Programmer displays a block diagram of the connections between the devices on your board.
    7. In the row with your .sof, check the box for the .sof.
    8. Check the box in the Program/Configure column.
    9. Click Start.
  5. After the hardware example design is configured on the Intel® Arria® 10 device, in the Intel® Quartus® Prime software, on the Tools menu, click System Debugging Tools > System Console.
  6. In the Tcl Console pane, type sysconsole_testbench.tcl.
  7. Type run_example_design.