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Why is FPGA Compilation Different?
Types of SYCL* FPGA Compilation
FPGA Compilation Flags
Emulate and Debug Your Design
Evaluate Your Kernel Through Simulation
Device Selectors for FPGA
FPGA IP Authoring Flow
Fast Recompile for FPGA
Generate Multiple FPGA Images (Linux only)
FPGA BSPs and Boards
Targeting Multiple Homogeneous FPGA Devices
Targeting Multiple Platforms
FPGA-CPU Interaction
FPGA Performance Optimization
Use of RTL Libraries for FPGA
Use SYCL Shared Library With Third-Party Applications
FPGA Workflows in IDEs
Intel oneAPI DPC++ Library (oneDPL)
Intel oneAPI Math Kernel Library (oneMKL)
Intel oneAPI Threading Building Blocks (oneTBB)
Intel oneAPI Data Analytics Library (oneDAL)
Intel oneAPI Collective Communications Library (oneCCL)
Intel oneAPI Deep Neural Network Library (oneDNN)
Intel oneAPI Video Processing Library (oneVPL)
Other Libraries
Emulate and Debug Your IP Component
Verify the functionality of your design by compiling your component and testbench to an x86-64 FPGA emulation executable that you can debug with a oneAPI debugger. This process is sometimes referred to as debugging through emulation.
Compiling your design to an x86-64 executable is faster than generating and simulating RTL. Shorter compilation time allows you to debug and refine your component quickly before verifying how your component is implemented in hardware.
No additional software is required to emulate your IP component, and no modifications to your host code are required.
For details, refer to Emulate and Debug Your Design.