FPGA Support Package for Intel® oneAPI DPC++/C++ Compiler
Use Reconfigurable Hardware to Accelerate Data-Centric Workloads and Productivity
Deprecation Notice
This support package is now deprecated and will not be available starting with the compiler's 2025.1 release. Altera* will continue to provide FPGA support through their dedicated FPGA software development tools.
Existing customers can continue to use the Intel® oneAPI DPC++/C++ Compiler 2025.0 release, which supports FPGA development. The compiler is available through Linux* package managers such as APT, YUM, DNF, or Zypper. Additionally, customers with an active support license can access the Intel oneAPI DPC++/C++ Compiler 2025.0 through their customer support account.
For more information and assistance with transitioning to the Altera development tools, reach out through the High-Level Design Community forum, contact your Altera representative, or send an email to oneapi@altera.com.
Use this support package to compile your SYCL* C++ code into a SystemVerilog module. Often called an IP core, this module can then be used in two ways:
- In an FPGA project using the Intel® Quartus® Prime Software Suite
- Added to an accelerator card as part of an all-in-one acceleration solution
Benefits
- Implement complex hardware designs using SYCL.
- Verify and debug your SYCL C++ code with a C++ testbench using emulation.
- Use the same testbench to simulate your generated IP core using Questa*-Intel® FPGA Edition or Questa*-Intel® FPGA Starter Edition.
- Refine designs with quick iterative development workflows.
- Guide your optimization activities with comprehensive reports.
Develop an All-in-One FPGA Acceleration Solution
Use this workflow to accelerate a workload with a plug-in FPGA accelerator card. The Intel oneAPI DPC++/C++ Compiler can combine your code with an adapter layer called a board support package (BSP). The compiler generates an executable that includes a full bitstream that automatically gets loaded into your FPGA card at runtime.
Benefits
- Analyze design performance graphically with Intel® VTune™ Profiler.
- Generate an FPGA bitstream with Intel® Quartus® Prime Pro Edition Software. No license required.
- Rapidly prototype and profile FPGA designs in real hardware on supported accelerator cards.
Develop Reusable IP Cores with SYCL* HLS
If you want complete control of how your workload is integrated, or if you don’t have access to an accelerator card with a board support package (BSP), you can choose to package your workload as a reusable IP core. You get the same rapid evaluation features as the acceleration workflow, but instead of generating a complete executable, the compiler only generates a SystemVerilog module. This module adheres to Avalon interface specifications and can easily be integrated into your Intel Quartus Prime Software projects.
Benefits
- Import your register transfer level (RTL) modules directly into Platform Designer or manually integrate them into your design via Intel Quartus Prime Software to develop designs for Intel FPGAs.
- Supports
- Agilex™ 5 FPGA
- Agilex 7 FPGA
- Intel® Stratix® 10 FPGA
- Intel® Arria® 10 FPGA
- Intel® Cyclone® 10 GX FPGA
- Cyclone® V FPGA
Download the Software
Intel® oneAPI Base Toolkit (Base Kit)
This kit is the foundation for your FPGA workflow environment. The Base Kit provides the Intel oneAPI DPC++/C++ compiler and other components required for FPGA workflows.
FPGA Support Package for the Intel oneAPI DPC++/C++ Compiler
The support package plugs into the Intel oneAPI DPC++/C++ Compiler to enable the FPGA workflows. With the FPGA Support Package installed, you can develop and optimize an FPGA workload and functionally verify it using the FPGA emulator. You can use detailed reports and graphical analysis views to review the generated SystemVerilog module.
Intel® Quartus® Prime Software
The Intel Quartus Prime Software is needed to synthesize your workload into a bitstream or automatically generate an RTL simulation testbench.
Patch History
Choose an FPGA Platform (Optional)
To use FPGA Acceleration flow, choose an FPGA platform and corresponding software:
- Locate the FPGA platform that you are targeting for your application.
- To get and install the FPGA platform and its BSP, go to the vendor website.
- Download and install the required version of Intel Quartus Prime Pro Edition Software for Linux*.
Documentation & Code Samples
Code Samples and Reference Designs
Get started right away with SYCL code samples that highlight productive design flows and the optimization techniques available for FPGA targets, such as fast recompilation flows, loop optimization techniques, and fine-grain control of FPGA resources.
Reference designs are larger application examples that demonstrate the performance of FPGAs. Reference designs are provided for several specific domains, including linear algebra, image processing, financial technology, database query analysis, and sorting and compression algorithms.
Documentation
Release Notes & System Requirements
Guides & Specifications
Webinars
Learn how C/C++ code can be more easily converted to SYCL in six steps.
Streamline FPGA Development with oneAPI Shared Libraries
See how to simplify FPGA development and create a fast Fourier transform (FFT) algorithm using a shared library.
From Slow to Go: Optimize FPGA Development & Performance
Focus on performance improvement techniques for optimizing an FPGA implementation, including creating an efficient design flow.
Your success is our success. Access these support resources when you need assistance.
For more help, see our general oneAPI Support.
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Product and Performance Information
The FPGA Add-On is intended to be used in conjunction with the Intel oneAPI DPC++ Compiler, which is part of the Intel® oneAPI Base Toolkit. Installation of both the base toolkit and this add-on are required to work through the compile stage of the FPGA design flow.