The Intel® Agilex™ Tools Support page provides links to interactive tools and other support resources to speed your design activity.  Tools and resource aids are grouped by category.  Technical documents are located on the Documentation tab (above).   Use the buttons below or scroll down  to view Tool catagory contents:

 

 

Models

Resource Description
BSDL Browse boundary-scan description language (BSDL) files by specific available devices and choose the appropriate device package. 
IBIS Browse input/output buffer information specification (IBIS) files by device family.  Downloads available for: List of Models available, Package Models and IBIS model files.
Browse boundary-scan description language (BSDL) files by specific available devices and choose the appropriate device package. 
Browse boundary-scan description language (BSDL) files by specific available devices and choose the appropriate device package. 

Board

Resource Description
PIN OUT Information Pin Out tables by device density - available in PDF, XLS or TXT formats.  External memory Interface (EMIF) and Hard processor System (HPS) pin information tables are also available. 
Pin Connection Guidelines Intel Agilex Device Family Pin Connection Guidelines  (PDF)

Power

Resource Description
Power Solution for Intel® Agilex™ FPGAs Validated Power Solutions Designed for Intel® Agilex™ FPGAs

HPS (SoC)

Resource Description
HPS Address Map and Definitions (ZIP Download) Intel Agilex SoC HPS Address Map and Register Definitions.  Available as a downloadable ZIP file.
RocketBoards.org View Intel Agilex projects on rocketboards.org
Emdedded Systems - Support Center

Expand your understanding of software development for Intel’s SoC FPGAs and Nios® II soft intellectual property (IP) processors. 

Links for: Linux*, SoC Bare-Metal, Nios II Bare-Metal Developers and also SoC Bootloader.

General

Resource Description
EMIF Spec Estimator - Tool The External Memory Interface Spec Estimator is a parametric tool that allows you to find and compare the performance of the supported external memory interfaces in Intel® FPGAs.
Device Configuration - Support Center Information on how to select, design, and implement configuration schemes and features. Also guidelines on how to bring up your system and debug the configuration links.
Ethernet IP - Support Center Information on how to select, design, and implement Ethernet links. Also guidelines on how to bring up your system and debug the Ethernet links.
External Memory Interface IP - Support Center
Information on how to plan, design, implement, and verify your external memory interfaces.
PCI Express* IP - Support Center Information on how to select, design, and implement PCIe links. Also guidelines on how to bring up your system and debug the PCIe links.
Transceiver PHY IP - Support Center
Information on how to select, design, and implement transceiver links. Also guidelines on how to bring up your system and debug the transceiver links.
All Support Centers  Step-by-Step Guidance for System Architect Developers, FPGA developers, Embedded Software developers, and Board Developers.  Additional Technology Support Centers.

More - additional support resources: