intreg Summary

Internal register map

Base Address: 0x10B00000


Register Address Offset	Bit Fields
`i_usbotg_0__usb_csr__10b00000__DWC_otg_intreg__SEG_L4_AHB_USB0_0x0_0x40000`
`GOTGCTL` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`				`Reserved_19` `RO 0x0`						`CurMod` `RO 0x0`	`OTGVer` `RW 0x0`	`BSesVld` `RO 0x0`	`ASesVld` `RO 0x0`	`DbncTime` `RO 0x0`	`ConIDSts` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_13` `RO 0x0`			`EHEn` `RW 0x0`	`DevHNPEn` `RW 0x0`	`HstSetHNPEn` `RW 0x0`	`HNPReq` `RW 0x0`	`HstNegScs` `RO 0x0`	`BvalidOvVal` `RW 0x0`	`BvalidOvEn` `RW 0x0`	`AvalidOvVal` `RW 0x0`	`AvalidOvEn` `RW 0x0`	`VbvalidOvVal` `RW 0x0`	`VbvalidOvEn` `RW 0x0`	`SesReq` `RW 0x0`	`SesReqScs` `RO 0x0`
`GOTGINT` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`											`Reserved_9` `RO 0x0`	`DbnceDone` `RW 0x0`	`ADevTOUTChg` `RW 0x0`	`HstNegDet` `RW 0x0`	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`						`HstNegSucStsChng` `RW 0x0`	`SesReqSucStsChng` `RW 0x0`	`RESERVED2` `RO 0x0`					`SesEndDet` `RW 0x0`	`RESERVED3` `RO 0x0`
`GAHBCFG` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED1` `RO 0x0`							`InvDescEndianess` `RW 0x0`	`AHBSingle` `RW 0x0`	`NotiAllDmaWrit` `RW 0x0`	`RemMemSupp` `RW 0x0`	`Reserved_6` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_6` `RO 0x0`							`PTxFEmpLvl` `RW 0x0`	`NPTxFEmpLvl` `RW 0x0`	`RESERVED` `RO 0x0`	`DMAEn` `RW 0x0`	`HBstLen` `RW 0x0`				`GlblIntrMsk` `RW 0x0`
`GUSBCFG` `0x12` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`CorruptTxPkt` `WO 0x0`	`ForceDevMode` `RW 0x0`	`ForceHstMode` `RW 0x0`	`TxEndDelay` `RW 0x0`	`Reserved_19` `RO 0x0`	`IC_USBCap` `RO 0x0`	`ULPI` `RW 0x0`	`Indicator` `RW 0x0`	`Complement` `RW 0x0`	`TermSelDLPulse` `RW 0x0`	`ULPIExtVbusIndicator` `RW 0x0`	`ULPIExtVbusDrv` `RW 0x0`	`ULPIClkSusM` `RW 0x0`	`ULPIAutoRes` `RW 0x0`	`Reserved_10` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_10` `RO 0x0`	`RESERVED` `RO 0x0`	`USBTrdTim` `RW 0x5`				`HNPCap` `RW 0x0`	`SRPCap` `RW 0x0`	`DDRSel` `RW 0x0`	`PHYSel` `RO 0x0`	`FSIntf` `RO 0x0`	`ULPI_UTMI_Sel` `RO 0x1`	`PHYIf` `RO 0x0`	`TOutCal` `RW 0x0`
`GRSTCTL` `0x16` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`AHBIdle` `RO 0x1`	`DMAReq` `RO 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`					`TxFNum` `RW 0x0`					`TxFFlsh` `RW 0x0`	`RxFFlsh` `RW 0x0`	`Reserved_3` `RO 0x0`	`FrmCntrRst` `RW 0x0`	`PIUFSSftRst` `RW 0x0`	`CSftRst` `RW 0x0`
`GINTSTS` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WkUpInt` `RW 0x0`	`SessReqInt` `RW 0x0`	`DisconnInt` `RW 0x0`	`ConIDStsChng` `RW 0x1`	`Reserved_24` `RO 0x0`	`PTxFEmp` `RO 0x1`	`HChInt` `RO 0x0`	`PrtInt` `RO 0x0`	`ResetDet` `RW 0x0`	`FetSusp` `RW 0x0`	`incomplP` `RW 0x0`	`incompISOIN` `RW 0x0`	`OEPInt` `RO 0x0`	`IEPInt` `RO 0x0`	`EPMis` `RW 0x0`	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EOPF` `RW 0x0`	`ISOOutDrop` `RW 0x0`	`EnumDone` `RW 0x0`	`USBRst` `RW 0x0`	`USBSusp` `RW 0x0`	`ErlySusp` `RW 0x0`	`Reserved_8` `RO 0x0`		`GOUTNakEff` `RO 0x0`	`GINNakEff` `RO 0x0`	`NPTxFEmp` `RO 0x1`	`RxFLvl` `RO 0x0`	`Sof` `RW 0x0`	`OTGInt` `RO 0x0`	`ModeMis` `RW 0x0`	`CurMod` `RO 0x0`
`GINTMSK` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WkUpIntMsk` `RW 0x0`	`SessReqIntMsk` `RW 0x0`	`DisconnIntMsk` `RW 0x0`	`ConIDStsChngMsk` `RW 0x0`	`Reserved_24` `RO 0x0`	`PTxFEmpMsk` `RW 0x0`	`HChIntMsk` `RW 0x0`	`PrtIntMsk` `RW 0x0`	`ResetDetMsk` `RW 0x0`	`FetSuspMsk` `RW 0x0`	`incomplPMsK` `RW 0x0`	`incompISOINMsk` `RW 0x0`	`OEPIntMsk` `RW 0x0`	`IEPIntMsk` `RW 0x0`	`EPMisMsk` `RW 0x0`	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EOPFMsk` `RW 0x0`	`ISOOutDropMsk` `RW 0x0`	`EnumDoneMsk` `RW 0x0`	`USBRstMsk` `RW 0x0`	`USBSuspMsk` `RW 0x0`	`ErlySuspMsk` `RW 0x0`	`Reserved_8` `RO 0x0`		`GOUTNakEffMsk` `RW 0x0`	`GINNakEffMsk` `RW 0x0`	`NPTxFEmpMsk` `RW 0x0`	`RxFLvlMsk` `RW 0x0`	`SofMsk` `RW 0x0`	`OTGIntMsk` `RW 0x0`	`ModeMisMsk` `RW 0x0`	`RESERVED` `RO 0x0`
`GRXSTSR` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_6` `RO 0x0`	`RESERVED` `RO 0x0`						`FN` `RO 0x0`				`PktSts` `RO 0x0`				`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DPID` `RO 0x0`	`BCnt` `RO 0x0`											`ChNum` `RO 0x0`
`GRXSTSP` `0x32` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_6` `RO 0x0`	`RESERVED` `RO 0x0`						`FN` `RO 0x0`				`PktSts` `RO 0x0`				`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DPID` `RO 0x0`	`BCnt` `RO 0x0`											`ChNum` `RO 0x0`
`GRXFSIZ` `0x36` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`				`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`RxFDep` `RW 0x2000`
`GNPTXFSIZ` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NPTXFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NPTXFStAddr` `RW 0x2000`
`GNPTXSTS` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`NPTxQTop` `RO 0x0`							`NPTxQSpcAvail` `RO 0x8`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NPTxFSpcAvail` `RO 0x2000`
`GPVNDCTL` `0x52` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DisUlpiDrvr` `RW 0x0`	`RESERVED` `RO 0x0`			`VStsDone` `RW 0x0`	`VStsBsy` `RO 0x0`	`NewRegReq` `RW 0x0`	`RESERVED1` `RO 0x0`		`RegWr` `RW 0x0`	`RegAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`VCtrl` `RW 0x0`								`RegData` `RW 0x0`
`GGPIO` `0x56` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`GPO` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GPI` `RO 0x0`
`GUID` `0x60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`GUID` `RO 0x12345678`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GUID` `RO 0x12345678`
`GSNPSID` `0x64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SynopsysID` `RO 0x4F54330A`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SynopsysID` `RO 0x4F54330A`
`GHWCFG1` `0x68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EpDir` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EpDir` `RO 0x0`
`GHWCFG2` `0x72` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`	`TknQDepth` `RO 0x8`					`PTxQDepth` `RO 0x3`		`NPTxQDepth` `RO 0x2`		`RESERVED` `RO 0x0`	`MultiProcIntrpt` `RO 0x0`	`DynFifoSizing` `RO 0x1`	`PerioSupport` `RO 0x1`	`NumHstChnl` `RO 0xF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NumHstChnl` `RO 0xF`		`NumDevEps` `RO 0xF`				`FSPhyType` `RO 0x0`		`HSPhyType` `RO 0x2`		`SingPnt` `RO 0x0`	`OtgArch` `RO 0x2`		`OtgMode` `RO 0x0`
`GHWCFG3` `0x76` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DfifoDepth` `RO 0x1F80`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`LPMMode` `RO 0x0`	`BCSupport` `RO 0x0`	`HSICMode` `RO 0x0`	`ADPSupport` `RO 0x0`	`RstType` `RO 0x0`	`OptFeature` `RO 0x0`	`VndctlSupt` `RO 0x1`	`I2CIntSel` `RO 0x0`	`OtgEn` `RO 0x1`	`PktSizeWidth` `RO 0x6`			`XferSizeWidth` `RO 0x8`
`GHWCFG4` `0x80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DescDMA` `RO 0x1`	`DescDMAEnabled` `RO 0x1`	`INEps` `RO 0xF`				`DedFifoMode` `RO 0x1`	`SessEndFltr` `RO 0x0`	`BValidFltr` `RO 0x0`	`AValidFltr` `RO 0x0`	`VBusValidFltr` `RO 0x0`	`IddgFltr` `RO 0x0`	`NumCtlEps` `RO 0xF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PhyDataWidth` `RO 0x0`		`RESERVED` `RO 0x0`						`ExtendedHibernation` `RO 0x0`	`Hibernation` `RO 0x0`	`AhbFreq` `RO 0x1`	`PartialPwrDn` `RO 0x0`	`NumDevPerioEps` `RO 0x0`
`GDFIFOCFG` `0x92` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPInfoBaseAddr` `RW 0x1F80`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GDFIFOCfg` `RW 0x2000`
`HPTXFSIZ` `0x256` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`PTxFSize` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`	`PTxFStAddr` `RW 0x4000`
`DIEPTXF1` `0x260` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`	`INEPnTxFStAddr` `RW 0x4000`
`DIEPTXF2` `0x264` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`	`INEPnTxFStAddr` `RW 0x6000`
`DIEPTXF3` `0x268` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x8000`
`DIEPTXF4` `0x272` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xA000`
`DIEPTXF5` `0x276` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xC000`
`DIEPTXF6` `0x280` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xE000`
`DIEPTXF7` `0x284` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x0`
`DIEPTXF8` `0x288` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x2000`
`DIEPTXF9` `0x292` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x4000`
`DIEPTXF10` `0x296` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x6000`
`DIEPTXF11` `0x300` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x8000`
`DIEPTXF12` `0x304` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xA000`
`DIEPTXF13` `0x308` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xC000`
`DIEPTXF14` `0x312` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xE000`
`DIEPTXF15` `0x316` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_2` `RO 0x0`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x0`
`HCFG` `0x1024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ModeChTimEn` `RW 0x0`	`RESERVED` `RO 0x0`				`PerSchedEna` `RW 0x0`	`FrListEn` `RW 0x0`		`DescDMA` `RW 0x0`	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ResValid` `RW 0x2`								`Ena32KHzS` `RW 0x0`	`RESERVED2` `RO 0x0`				`FSLSSupp` `RW 0x0`	`FSLSPclkSel` `RW 0x0`
`HFIR` `0x1028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`															`HFIRRldCtrl` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FrInt` `RW 0xEA60`
`HFNUM` `0x1032` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`FrRem` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FrNum` `RO 0x3FFF`
`HPTXSTS` `0x1040` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PTxQTop` `RO 0x0`								`PTxQSpcAvail` `RO 0x10`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PTxFSpcAvail` `RO 0x2000`
`HAINT` `0x1044` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HAINT` `RO 0x0`
`HAINTMSK` `0x1048` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HAINTMsk` `RW 0x0`
`HFLBAddr` `0x1052` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HFLBAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HFLBAddr` `RW 0x0`
`HPRT` `0x1088` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`													`PrtSpd` `RO 0x0`		`PrtTstCtl` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PrtTstCtl` `RW 0x0`			`PrtPwr` `RW 0x0`	`PrtLnSts` `RO 0x0`		`RESERVED` `RO 0x0`	`PrtRst` `RW 0x0`	`PrtSusp` `RW 0x0`	`PrtRes` `RW 0x0`	`PrtOvrCurrChng` `RW 0x0`	`PrtOvrCurrAct` `RO 0x0`	`PrtEnChng` `RW 0x0`	`PrtEna` `RW 0x0`	`PrtConnDet` `RW 0x0`	`PrtConnSts` `RO 0x0`
`HCCHAR0` `0x1280` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT0` `0x1284` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT0` `0x1288` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK0` `0x1292` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ0` `0x1296` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA0` `0x1300` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB0` `0x1308` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR1` `0x1312` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT1` `0x1316` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT1` `0x1320` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK1` `0x1324` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ1` `0x1328` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA1` `0x1332` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB1` `0x1340` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR2` `0x1344` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT2` `0x1348` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT2` `0x1352` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK2` `0x1356` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ2` `0x1360` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA2` `0x1364` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB2` `0x1372` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR3` `0x1376` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT3` `0x1380` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT3` `0x1384` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK3` `0x1388` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ3` `0x1392` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA3` `0x1396` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB3` `0x1404` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR4` `0x1408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT4` `0x1412` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT4` `0x1416` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK4` `0x1420` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ4` `0x1424` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA4` `0x1428` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB4` `0x1436` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR5` `0x1440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT5` `0x1444` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT5` `0x1448` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK5` `0x1452` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ5` `0x1456` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA5` `0x1460` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB5` `0x1468` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR6` `0x1472` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT6` `0x1476` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT6` `0x1480` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK6` `0x1484` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ6` `0x1488` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA6` `0x1492` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB6` `0x1500` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR7` `0x1504` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT7` `0x1508` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT7` `0x1512` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK7` `0x1516` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ7` `0x1520` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA7` `0x1524` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB7` `0x1532` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR8` `0x1536` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT8` `0x1540` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT8` `0x1544` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK8` `0x1548` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ8` `0x1552` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA8` `0x1556` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB8` `0x1564` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR9` `0x1568` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT9` `0x1572` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT9` `0x1576` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK9` `0x1580` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ9` `0x1584` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA9` `0x1588` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB9` `0x1596` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR10` `0x1600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT10` `0x1604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT10` `0x1608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK10` `0x1612` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ10` `0x1616` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA10` `0x1620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB10` `0x1628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR11` `0x1632` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT11` `0x1636` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT11` `0x1640` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK11` `0x1644` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ11` `0x1648` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA11` `0x1652` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB11` `0x1660` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR12` `0x1664` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT12` `0x1668` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT12` `0x1672` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK12` `0x1676` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ12` `0x1680` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA12` `0x1684` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB12` `0x1692` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR13` `0x1696` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT13` `0x1700` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT13` `0x1704` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK13` `0x1708` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ13` `0x1712` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA13` `0x1716` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB13` `0x1724` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR14` `0x1728` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT14` `0x1732` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT14` `0x1736` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK14` `0x1740` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ14` `0x1744` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA14` `0x1748` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB14` `0x1756` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR15` `0x1760` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT15` `0x1764` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT15` `0x1768` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK15` `0x1772` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ15` `0x1776` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA15` `0x1780` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB15` `0x1788` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`DCFG` `0x2048` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ResValid` `RW 0x2`						`PerSchIntvl` `RW 0x0`		`DescDMA` `RW 0x0`	`Reserved_9` `RO 0x8`					`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ErraticIntMsk` `RW 0x0`	`XCVRDLY` `RW 0x0`	`EnDevOutNak` `RW 0x0`	`PerFrInt` `RW 0x0`		`DevAddr` `RW 0x0`							`Ena32KHzSusp` `RW 0x0`	`NZStsOUTHShk` `RW 0x0`	`DevSpd` `RW 0x0`
`DCTL` `0x2052` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`													`Reserved_14` `RO 0x0`	`EnContOnBNA` `RW 0x0`	`NakOnBble` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IgnrFrmNum` `RW 0x0`	`GMC` `RW 0x0`		`Reserved_10` `RO 0x0`	`PWROnPrgDone` `RW 0x0`	`CGOUTNak` `WO 0x0`	`SGOUTNak` `WO 0x0`	`CGNPInNak` `WO 0x0`	`SGNPInNak` `WO 0x0`	`TstCtl` `RW 0x0`			`GOUTNakSts` `RO 0x0`	`GNPINNakSts` `RO 0x0`	`SftDiscon` `RW 0x1`	`RmtWkUpSig` `RW 0x0`
`DSTS` `0x2056` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`								`DevLnSts` `RO 0x0`		`SOFFN` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SOFFN` `RO 0x0`								`RESERVED1` `RO 0x0`				`ErrticErr` `RO 0x0`	`EnumSpd` `RO 0x1`		`SuspSts` `RO 0x0`
`DIEPMSK` `0x2064` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`NAKMsk` `RW 0x0`	`Reserved_10` `RO 0x0`			`BNAInIntrMsk` `RW 0x0`	`TxfifoUndrnMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`INEPNakEffMsk` `RW 0x0`	`INTknEPMisMsk` `RW 0x0`	`INTknTXFEmpMsk` `RW 0x0`	`TimeOUTMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`EPDisbldMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`DOEPMSK` `0x2068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETMsk` `RW 0x0`	`NAKMsk` `RW 0x0`	`BbleErrMsk` `RW 0x0`	`Reserved_10` `RO 0x0`		`BnaOutIntrMsk` `RW 0x0`	`OutPktErrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvdMsk` `RW 0x0`	`OUTTknEPdisMsk` `RW 0x0`	`SetUPMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`EPDisbldMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`DAINT` `0x2072` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OutEPInt15` `RO 0x0`	`OutEPInt14` `RO 0x0`	`OutEPInt13` `RO 0x0`	`OutEPInt12` `RO 0x0`	`OutEPInt11` `RO 0x0`	`OutEPInt10` `RO 0x0`	`OutEPInt9` `RO 0x0`	`OutEPInt8` `RO 0x0`	`OutEPInt7` `RO 0x0`	`OutEPInt6` `RO 0x0`	`OutEPInt5` `RO 0x0`	`OutEPInt4` `RO 0x0`	`OutEPInt3` `RO 0x0`	`OutEPInt2` `RO 0x0`	`OutEPInt1` `RO 0x0`	`OutEPInt0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpInt15` `RO 0x0`	`InEpInt14` `RO 0x0`	`InEpInt13` `RO 0x0`	`InEpInt12` `RO 0x0`	`InEpInt11` `RO 0x0`	`InEpInt10` `RO 0x0`	`InEpInt9` `RO 0x0`	`InEpInt8` `RO 0x0`	`InEpInt7` `RO 0x0`	`InEpInt6` `RO 0x0`	`InEpInt5` `RO 0x0`	`InEpInt4` `RO 0x0`	`InEpInt3` `RO 0x0`	`InEpInt2` `RO 0x0`	`InEpInt1` `RO 0x0`	`InEpInt0` `RO 0x0`
`DAINTMSK` `0x2076` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OutEPMsk15` `RW 0x0`	`OutEPMsk14` `RW 0x0`	`OutEPMsk13` `RW 0x0`	`OutEPMsk12` `RW 0x0`	`OutEPMsk11` `RW 0x0`	`OutEPMsk10` `RW 0x0`	`OutEPMsk9` `RW 0x0`	`OutEPMsk8` `RW 0x0`	`OutEPMsk7` `RW 0x0`	`OutEPMsk6` `RW 0x0`	`OutEPMsk5` `RW 0x0`	`OutEPMsk4` `RW 0x0`	`OutEPMsk3` `RW 0x0`	`OutEPMsk2` `RW 0x0`	`OutEPMsk1` `RW 0x0`	`OutEPMsk0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpMsk15` `RW 0x0`	`InEpMsk14` `RW 0x0`	`InEpMsk13` `RW 0x0`	`InEpMsk12` `RW 0x0`	`InEpMsk11` `RW 0x0`	`InEpMsk10` `RW 0x0`	`InEpMsk9` `RW 0x0`	`InEpMsk8` `RW 0x0`	`InEpMsk7` `RW 0x0`	`InEpMsk6` `RW 0x0`	`InEpMsk5` `RW 0x0`	`InEpMsk4` `RW 0x0`	`InEpMsk3` `RW 0x0`	`InEpMsk2` `RW 0x0`	`InEpMsk1` `RW 0x0`	`InEpMsk0` `RW 0x0`
`DVBUSDIS` `0x2088` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DVBUSDis` `RW 0x17D7`
`DVBUSPULSE` `0x2092` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`				`DVBUSPulse` `RW 0x5B8`
`DTHRCTL` `0x2096` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`				`ArbPrkEn` `RW 0x1`	`RESERVED1` `RO 0x1`	`RxThrLen` `RW 0x8`									`RxThrEn` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED2` `RO 0x0`			`AHBThrRatio` `RW 0x0`		`TxThrLen` `RW 0x8`									`ISOThrEn` `RW 0x0`	`NonISOThrEn` `RW 0x0`
`DIEPEMPMSK` `0x2100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpTxfEmpMsk` `RW 0x0`
`DIEPCTL0` `0x2304` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`RESERVED` `RO 0x0`		`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`RESERVED1` `RO 0x0`	`EPType` `RO 0x0`		`NAKSts` `RO 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RO 0x1`	`Reserved_2` `RO 0x0`				`RESERVED3` `RO 0x0`									`MPS` `RW 0x0`
`DIEPINT0` `0x2312` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ0` `0x2320` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`											`PktCnt` `RW 0x0`		`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`									`XferSize` `RW 0x0`
`DIEPDMA0` `0x2324` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS0` `0x2328` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB0` `0x2332` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL1` `0x2336` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT1` `0x2344` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ1` `0x2352` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA1` `0x2356` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS1` `0x2360` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB1` `0x2364` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL2` `0x2368` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT2` `0x2376` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ2` `0x2384` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA2` `0x2388` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS2` `0x2392` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB2` `0x2396` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL3` `0x2400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT3` `0x2408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ3` `0x2416` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA3` `0x2420` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS3` `0x2424` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB3` `0x2428` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL4` `0x2432` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT4` `0x2440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ4` `0x2448` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA4` `0x2452` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS4` `0x2456` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB4` `0x2460` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL5` `0x2464` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT5` `0x2472` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ5` `0x2480` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA5` `0x2484` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS5` `0x2488` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB5` `0x2492` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL6` `0x2496` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT6` `0x2504` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ6` `0x2512` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA6` `0x2516` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS6` `0x2520` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB6` `0x2524` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL7` `0x2528` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT7` `0x2536` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ7` `0x2544` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA7` `0x2548` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS7` `0x2552` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB7` `0x2556` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL8` `0x2560` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT8` `0x2568` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ8` `0x2576` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA8` `0x2580` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS8` `0x2584` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB8` `0x2588` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL9` `0x2592` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT9` `0x2600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ9` `0x2608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA9` `0x2612` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS9` `0x2616` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB9` `0x2620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL10` `0x2624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT10` `0x2632` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ10` `0x2640` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA10` `0x2644` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS10` `0x2648` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB10` `0x2652` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL11` `0x2656` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT11` `0x2664` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ11` `0x2672` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA11` `0x2676` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS11` `0x2680` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB11` `0x2684` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL12` `0x2688` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT12` `0x2696` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ12` `0x2704` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA12` `0x2708` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS12` `0x2712` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB12` `0x2716` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL13` `0x2720` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT13` `0x2728` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ13` `0x2736` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA13` `0x2740` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS13` `0x2744` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB13` `0x2748` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL14` `0x2752` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT14` `0x2760` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ14` `0x2768` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA14` `0x2772` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS14` `0x2776` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB14` `0x2780` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL15` `0x2784` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved_5` `RO 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DIEPINT15` `0x2792` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_10` `RO 0x0`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ15` `0x2800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA15` `0x2804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS15` `0x2808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB15` `0x2812` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL0` `0x2816` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RO 0x0`	`RESERVED` `RO 0x0`		`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`RESERVED1` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RO 0x0`		`NAKSts` `RO 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RO 0x1`	`RESERVED3` `RO 0x0`													`MPS` `RO 0x0`
`DOEPINT0` `0x2824` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ0` `0x2832` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`SUPCnt` `RW 0x0`		`RESERVED1` `RO 0x0`									`PktCnt` `RW 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED2` `RO 0x0`									`XferSize` `RW 0x0`
`DOEPDMA0` `0x2836` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB0` `0x2844` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL1` `0x2848` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT1` `0x2856` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ1` `0x2864` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA1` `0x2868` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB1` `0x2876` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL2` `0x2880` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT2` `0x2888` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ2` `0x2896` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA2` `0x2900` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB2` `0x2908` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL3` `0x2912` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT3` `0x2920` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ3` `0x2928` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA3` `0x2932` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB3` `0x2940` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL4` `0x2944` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT4` `0x2952` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ4` `0x2960` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA4` `0x2964` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB4` `0x2972` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL5` `0x2976` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT5` `0x2984` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ5` `0x2992` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA5` `0x2996` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB5` `0x3004` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL6` `0x3008` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT6` `0x3016` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ6` `0x3024` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA6` `0x3028` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB6` `0x3036` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL7` `0x3040` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT7` `0x3048` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ7` `0x3056` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA7` `0x3060` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB7` `0x3068` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL8` `0x3072` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT8` `0x3080` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ8` `0x3088` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA8` `0x3092` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB8` `0x3100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL9` `0x3104` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT9` `0x3112` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ9` `0x3120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA9` `0x3124` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB9` `0x3132` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL10` `0x3136` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT10` `0x3144` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ10` `0x3152` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA10` `0x3156` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB10` `0x3164` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL11` `0x3168` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT11` `0x3176` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ11` `0x3184` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA11` `0x3188` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB11` `0x3196` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL12` `0x3200` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT12` `0x3208` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ12` `0x3216` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA12` `0x3220` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB12` `0x3228` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL13` `0x3232` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT13` `0x3240` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ13` `0x3248` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA13` `0x3252` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB13` `0x3260` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL14` `0x3264` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT14` `0x3272` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ14` `0x3280` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA14` `0x3284` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB14` `0x3292` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL15` `0x3296` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved_7` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved_1` `RO 0x0`				`MPS` `RW 0x0`
`DOEPINT15` `0x3304` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_14` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved_9` `RO 0x0`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved_7` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ15` `0x3312` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA15` `0x3316` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB15` `0x3324` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`PCGCCTL` `0x3584` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_4` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_4` `RO 0x0`								`L1Suspended` `RO 0x0`	`PhySleep` `RO 0x0`	`Reserved_2` `RO 0x0`		`RstPdwnModule` `RW 0x0`	`Reserved_1` `RO 0x0`		`StopPclk` `RW 0x0`