HAINTMSK 

         Host All Channels Interrupt Mask Register
Module Instance Base Address Register Address
i_usbotg_0__usb_csr__10b00000__DWC_otg_intreg__SEG_L4_AHB_USB0_0x0_0x40000 0x10B00000 0x10B00418

Size: 32

Offset: 0x418

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved_1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

HAINTMsk

RW 0x0

HAINTMSK Fields

Bit Name Description Access Reset
31:16 Reserved_1 
Reserved bitfield added by Magillem
 RO 0x0
15:0 HAINTMsk 
Channel Interrupt Msk for channel
Value Description
0xa Mask Channel 10
0xb Mask Channel 11
0xc Mask Channel 12
0xd Mask Channel 13
0xe Mask Channel 14
0xf Mask Channel 15
0x0 Mask Channel 0
0x1 Mask Channel 1
0x2 Mask Channel 2
0x3 Mask Channel 3
0x4 Mask Channel 4
0x5 Mask Channel 5
0x6 Mask Channel 6
0x7 Mask Channel 7
0x8 Mask Channel 8
0x9 Mask Channel 9
RW 0x0