Intel® Stratix® 10 FPGA and SoC FPGA

Intel® Stratix® 10 FPGA and SoC FPGA deliver innovative advantages in performance, power efficiency, density, and system integration. Featuring the revolutionary Intel® Hyperflex™ FPGA Architecture and built combining Intel's patented Embedded Multi-Die Interconnect Bridge (EMIB) technology, the Advanced Interface Bus (AIB), and a growing portfolio of chiplets, Intel® Stratix® 10 devices deliver up to 2X performance gains over previous-generation, high-performance FPGA.1

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Intel® Stratix® 10 FPGA and SoC FPGA

Data Center Acceleration

Cognitive Computing

High-Performance Accelerators

  • Up to 8.6 TFLOPS.
  • Up to 143 INT8 or 286 INT4 TOPS at ~1-2 TOPS/W2.
  • Highest fabric performance.
  • Highest memory bandwidth.

Algorithm Flexibility

  • OpenCL*2 platform.
  • Software front end for security and flow control with integrated ARM* Cortex*-A53 hard processor system.

Unique to Intel® Stratix® 10 Devices

  • First FPGA devices to support Intel® Ultra Path Interconnect (UPI) for direct coherent connection to Intel® Xeon® Scalable processor.
  • FPGA PCIe* hard IP with configuration up to Gen4 x16 at 16 Gbps.
  • Intel® Hyperflex™ FPGA Architecture delivers up to 1 GHz performance, enabling breakthroughs in computational throughput.
  • Hardened single-precision floating-point DSP block, compliant with IEEE 754 standard, delivers GPU-class floating performance at a fraction of the power.
  • Hardened AI Tensor Block tuned for common matrix-matrix or vector-matrix multiplications in AI acceleration applications resulting in up to 143 INT8 TOPS or 286 INT4 TOPS.3
  • Secure cloud solutions using the security features.

Wireline

Bridging and Aggregation

Enabling New Network Infrastructure

High Throughput with Power Efficiency

  • Up to 10 TFLOPS 400G traffic manager with 600 million packet per second throughput.
  • Less than 1 watt per 10 Gbps.

Flexible, High-performance Interconnect

  • Adaptable, scalable, and optimized IP portolio including 400G Ethernet.
  • Integrated processor for system monitoring and management.

Unique to Intel® Stratix® 10 Devices

  • fMAX over 700 MHz using the Intel® HyperFlex™ FPGA Architecture enabling 400G Ethernet.
  • 512 bit wide datapath running at 2X performance enables half-size IP compared to conventional architectures.

OTN/Data Center Interconnect

400 Gbit/s Muxponder for Metro / DCI Features

Four OTU4 Line Side Interface

  • OTL4.4.
  • GFEC.
  • ODUk/flex – ODU4 multiplexer.

20 ‘Any Rate’ Client Interfaces

  • 16 interfaces from 1GE to 25GE/32GFC
  • Alternatively 4 x 100GE.
  • 4 interfaces of 1-14G.

Cross-Connect

  • Full add/drop connectivity between line-line and line-client.
  • Protection switching.

Optional Features

  • 128GFC client.
  • KP-FEC (544, 514) for clients.
  • PAM4 transceivers.

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2.4 Tbit/s Switch/Muxponder for DCI

2.4 Tbit/s Cross-connect between Ethernet Flows.

1.2 Tbit/s FlexE Muxponder/Transponder.

(528,514,10) RS-FEC and (544,514,10) KP-FEC Support.

Optical interfaces: FlexE Server, 100GE, 25GE, 10GE.

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FlexE Configurable as 400G/200G+200G/100G+300G.

Cross-connect Supports: 10/25/50/100GE Flows.

Low Power FEC Hard IP while Providing Fabric Flexibility.

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Unique to Intel® Stratix® 10 Devices

  • Heterogeneous 3D System-in-Package (SiP) integration of transceiver tiles delivers 30G backplane support with a path to 58G data rates.
  • Intel® Hyperflex™ FPGA Architecture enables 2X performance resulting in significant IP size reduction.
  • Hardened single-precision floating-point DSP block, compliant with IEEE 754 standard, delivers GPU-class floating performance at a fraction of the power.
  • Secure cloud solutions using the security features.

Radar

Digitizing the Radar Front-End

Highest Performance per Watt

  • Up to 10 TFLOPS single-precision floating-point performance.
  • Up to 80 GFLOPS/Watt.

High-throughput Front End

  • High number of simultaneous beams with high bandwidth.
  • Beam former IP.

Unique to Intel® Stratix® 10 Devices

  • Up to 10 TFLOPS of IEEE 754 compliant single-precision floating-point performance delivers GPU class performance at a fraction of the power.
  • Cover fMAX up to 1 GHz enabling high throughput beam processing.

ASIC Prototyping and Emulation

Highest FPGA Fabric Capacity

Highest Density for Scalability

  • 10.2 million LE core fabric.

Debug Productivity

  • Readback and writeback IP.

Highest I/O Counts for Flexibility

  • 2,300+ I/Os.

Integration with Multiple Fabric and Transceiver Chiplets

  • Intel® Embedded Multi-Die Interconnect Bridge (EMIB) technology.

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Unique to Intel® Stratix® 10 Devices

  • Highest density enable customers to scale prototyping and emulation solution.
  • Highest I/O counts provide flexibility for design partitioning across multiple FPGAs.
  • Readback and writeback IP enhances debug productivity.

Cyber Security

Network Intrusion Detection and Prevention

400G Throughput Bump-in-the-Wire

Line Rate Analysis of Data Traffic

  • From 1G to 400G
  • Implement Intrusion Prevention Systems (IPS) and Intrusion Detection Systems (IDS) on streaming traffic.

Bump-in-the-Wire

  • Security performed on traffic flows prior to entering network.
  • Continuous network monitoring or tagging of live traffic.

Unique to Intel® Stratix® 10 Devices

  • fMAX over 900 MHz allows monitoring of all supported protocols at line rates.
  • ARM* Cortex*-A53 processor enables direct interfacing with existing IT software.
  • Partial reconfiguration and OpenCL* platform allow for easy rules updates.

Additional Resources

Explore more content related to Intel® FPGA devices such as development boards, intellectual property, support and more.

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Support Resources

Resource center for training, documentation, downloads, tools and support options.

Development boards

Development Boards

Get started with our FPGA and accelerate your time-to-market with Intel-validated hardware and designs.

Intellectual property

Intellectual Property

Shorten your design cycle with a broad portfolio of Intel-validated IP cores and reference designs.

Design tools

FPGA Design Software

Explore Quartus Prime Software and our suite of productivity-enhancing tools to help you rapidly complete your hardware and software designs.

Contact sales

Contact Sales

Get in touch with sales for your Intel® FPGA product design and acceleration needs.

Where to buy

Where to Buy

Contact an Intel® Authorized Distributor today.

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Product and Performance Information

1

Comparison based on Stratix® V vs. Intel® Stratix® 10 using Intel® Quartus® Prime Pro 16.1 Early Beta. Stratix® V Designs were optimized using 3 step optimization process of Hyper-Retiming, Hyper-Pipelining, and Hyper-Optimization in order to utilize Intel® Stratix® 10 architecture enhancements of distributed registers in core fabric. Designs were analyzed using Intel® Quartus® Prime Pro Fast Forward Compile performance exploration tool. For more details, refer to Intel® Hyperflex™ FPGA Architecture Overview White Paper: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01220-hyperflex-architecture-fpga-socs.pdf. Actual performance users will achieve varies based on level of design optimization applied. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.

2OpenCL* and the OpenCL* logo are trademarks of Apple Inc. used by permission by Khronos.
3

Based on internal Intel estimates.
Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks.
Intel® technologies may require enabled hardware, software or service activation.
No product or component can be absolutely secure.
Results have been estimated or simulated. Your costs and results may vary.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.