You can easily search the entire Intel.com site in several ways.
You can also try the quick links below to see results for most popular searches.
The browser version you are using is not recommended for this site.Please consider upgrading to the latest version of your browser by clicking one of the following links.
DDR5 and DDR4 offer higher performance, density and lower power and more control features compared to DDR3. Intel FPGA DDR5 and DDR4 EMIF IP offers solutions for high computing memory needs for client and data center systems.
Read Intel Agilex® FPGA EMIF User Guide ›
Read Stratix 10 EMIF User Guide ›
Intel Agilex® 7 FPGAs & SoCs, Intel® Stratix® 10 FPGAs & SoC and Intel® Arria® 10 FPGAs implement DRAM hardened memory controller & PHY. Hardening the controller & PHY offers several advantages which include:
Intel Agilex® 5 FPGAs
Intel Agilex® 7 FPGA M-Series
Intel Agilex® 7 FPGA I- and F- Series
Intel® Stratix® 10 FPGA
Max Interface Width
Maximum Interface Rate
4667 Mbps (LPDDR5)
5600 Mbps (DDR5)
3200 Mbps (DDR4)
2666 Mbps (DDR4)
Maximum Ranks Supported
EMIF Debug toolkit features include the below basic and advanced debug capabilities:
Find the right Intel® FPGA Intellectual Property core for your needs.
For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.
Evaluation mode and purchasing information for Intel® FPGA Intellectual Property cores.
Learn more about designing with Intel® FPGA IP, a large selection of off-the-shelf cores optimized for Intel® FPGAs.
Free Intel® FPGA IP Core licenses with an active license for Intel® Quartus® Prime Standard or Pro Edition Software.
Download design examples and reference designs for Intel® FPGA devices.
Get in touch with sales for your Intel® FPGA product design and acceleration needs.