High-Speed Reed Solomon Intel® FPGA IP Core

The High-Speed Reed Solomon Intel® FPGA intellectual property (IP) core uses a large parallel architecture to achieve a large throughput for applications that require 100 Gbps. The IP core is suitable for 10G (such as OTN) or 100G Ethernet (IEEE 802.3bj/bm) applications.

Read the High-speed Reed-Solomon IP Core User Guide ›

High-Speed Reed Solomon Intel® FPGA IP Core

Features

The High-Speed Reed Solomon Intel® FPGA IP core has the following features:

  • Fully parameterizable:
  • Number of bits per symbol
  • Number of symbols per codeword
  • Number of check symbols per codeword
  • Field polynomial
  • Avalon® Streaming (Avalon-ST) interfaces
  • Testbenches to verify the IP core
  • IP functional simulation models for use in Intel FPGA-supported VHDL and Verilog HDL simulators

Additional Resources

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Technical Support

For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.

IP Evaluation and Purchase

Evaluation mode and purchasing information for Altera® FPGA Intellectual Property cores.

IP Base Suite

Free Altera® FPGA IP Core licenses with an active license for Quartus® Prime Standard or Pro Edition Software.

Design Examples

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