BCH Intel® FPGA IP Core

The Bose, Chaudhuri, and Hocquenghem (BCH) error correction intellectual property (IP) core is typically used in NAND flash applications. The BCH Intel FPGA IP core is often used as a companion code with other forward error correction (FEC) IP cores, such as the Reed-Solomon and low-density parity-check (LDPC) IP cores.

Read the BCH Intel FPGA IP user guide ›

BCH Intel® FPGA IP Core

Features

The BCH Intel FPGA IP core has the following features:

  • Encoder and decoder
  • Fully parameterizable:
  • Number of symbols per codeword
  • Number of check symbols per codeword
  • Number of parallel input bits

Additional Resources

Find IP

Find the right Altera® FPGA Intellectual Property core for your needs.

Technical Support

For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.

IP Evaluation and Purchase

Evaluation mode and purchasing information for Altera® FPGA Intellectual Property cores.

IP Base Suite

Free Altera® FPGA IP Core licenses with an active license for Quartus® Prime Standard or Pro Edition Software.

Design Examples

Download design examples and reference designs for Altera® FPGA devices.

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