Hard Processor System Component Reference Manual: Agilex™ 3 SoCs

ID 851703
Date 5/30/2025
Public
Document Table of Contents

2.3.6. Supported Memory Protocols Among Device Families

The following table describes what memory protocols are supported on the HPS EMIF across the different devices.

Warning: Mismatching the HPS protocol and parameters with the HPS-EMIF protocol and parameters is not supported. For example, configuring the HPS to be LPDDR4 1×16 and configuring the HPS-EMIF to be LPDDR4 1×32 is not supported.
Table 10.  Supported Memory Protocols Differences Among Device Families
  Agilex™ 3 C-Series SoC
Protocol (for HPS EMIF) Width
LPDDR4

1ch ×16

2ch ×16

1ch ×32