Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 10/10/2025
Public
Document Table of Contents

12.3. EMAC GMII through FPGA Fabric

This chapter describes the supported use cases of the EMAC GMII through the FPGA fabric:
  • GMII to RGMII through RGMII adapter via FPGA I/Os
  • GMII to SGMII+ through multirate Ethernet PHY adapter via FPGA I/Os
Table 351.  EMAC Configuration
EMAC Interface Interface Configuration Supported Ethernet Rates Agilex™ 5 Device Interface/Pins Soft IP (SIP) Component
RGMII RGMII via HPS pins 10M/100M/1G HPS-RGMII N/A
GMII GMII to RGMII (SIP) via HVIO pins 10M/100M/1G FPGA-RGMII HPS GMII to RGMII Adapter IP
GMII GMII to SGMII+ (SIP) to XCVR (UX) via FPGA pins

10M/100M/1G/2.5G

FPGA-XCVR 1G/2.5G/5G/10G Multirate Ethernet PHY IP