External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP Design Example User Guide

ID 772632
Date 4/03/2023
Public

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3. Design Example Description for External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP

When you parameterize and generate your EMIF IP you can specify that the system create directories for simulation and synthesis file sets, and generate the file sets automatically.

If you set Simulation or Synthesis to True on the Example Design tab, the system creates a complete simulation file set and/or a complete synthesis file set, in accordance with your selection.