AN 987: Static Update Partial Reconfiguration Tutorial: for Intel® Agilex™ F-Series FPGA Development Board
ID
749443
Date
10/24/2022
Public
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2.5.1. Step 1: Getting Started
2.5.2. Step 2: Create Design Partitions
2.5.3. Step 3: Allocate Placement and Routing Regions
2.5.4. Step 4: Define Personas
2.5.5. Step 5: Create Revisions
2.5.6. Step 6: Compile the Base Revision
2.5.7. Step 7: Set Up PR Implementation Revisions
2.5.8. Step 8: Change the SUPR Logic
2.5.9. Step 9: Program the Board
2.5.10. Modifying the SUPR Partition
2.5.10. Modifying the SUPR Partition
You can modify an existing SUPR partition. After modifying the SUPR partition, you must compile it, generate the .sof file, and program the board, without compiling the other personas. For example, follow these steps to change the top_counter_fast.sv module to count faster:
- Set impl_blinking_led_supr_new as the current revision.
- In the top_counter_fast.sv file, replace the count_d + 2 statement with count_d + 4.
- Run the following commands to re-synthesize the SUPR block and generate the new .sof file:
quartus_sh --flow compile blinking_led \ -c impl_blinking_led_supr_new
The resulting .sof now contains the new SUPR region, and uses blinking_led for the default (power-on) persona.