Nios® V Processor Software Developer Handbook

ID 743810
Date 2/14/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.3.4.5.2. Recommended Architecture Practice

Many of the hardware and software coherency issues that arise during the creation of the application software are problems of misplaced peripheral addresses. Because of the flexibility provided by Platform Designer, almost any peripheral in the system can be assigned an arbitrary address, or have its address modified during system creation.

Implement the following practices to prevent this type of coherency issue during the creation of your software application:

  • Peripheral and Memory Addressing —The Nios® V processor tools automatically generate a system header file, system.h, that defines a set of #define symbols for every peripheral in the system. These definitions specify the peripheral name, base address location, and address span.

To protect against coherency issues, access all system peripherals and memory components with their system.h name and address span symbols. This method guarantees successful peripheral register access even after a peripheral's addressable location changes.

For example, if your system includes a UART peripheral named UART1 (located at address 0x1000), access the UART1 registers using the system.h address symbol (IOWR_32(UART1_BASE, 0x0,0x10101010)) rather than using its address (IOWR_32(0x1000, 0x0,0x10101010)).