Nios® V Processor Software Developer Handbook

ID 743810
Date 2/14/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.11.1. Apply Compiler Flags

riscv32-unknown-elf-gcc is the provided RISC-V toolchain in the Ashling* RiscFree* IDE for Intel® FPGAs. Compiler switch may be of use when optimizing code for small RAM footprints. These switches can be set in the BSP Editor GUI settings.

  • -Os: This is the most important compiler switch when optimizing for space. This instructs riscv32-unknown-elf-gcc to pervasively optimize for space rather than speed.

  • -Og: Alternatively, this generates codes that is easier to understand by the debugger during debugging.