Triple-Speed Ethernet Intel Agilex FPGA IP Design Example User Guide

ID 741330
Date 12/09/2022

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1.4. Compiling and Configuring the Design Example in Hardware

To compile the hardware design example and configure it on your Intel® Agilex™ device, follow these steps:

  1. Ensure hardware design example generation is complete.
  2. In the Intel® Quartus® Prime Pro Edition software, open the Intel® Quartus® Prime project <design_example_dir>/hardware_test_design/altera_eth_tse_hw.qpf .
  3. On the Processing menu, click Start Compilation.
  4. After a successful compilation, a.sof file is available in <design_example_dir>/hardwarde_test_design directory.