HDMI PHY IP Design Example User Guide

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ID 732781
Date 7/30/2025
Public

1.3. Generating the Design

Use the HDMI PHY IP parameter editor in the Quartus® Prime software to generate the design examples.
Figure 3. Generating the Design Flow
  1. Create a project targeting Arria® 10 device family and select the desired device.
  2. In the IP Catalog, locate and double-click Interface Protocols > Audio & Video > HDMI TX PHY IP (or HDMI RX PHY IP ). The New IP Variant or New IP Variation window appears.
  3. Specify a top-level name for your custom IP variation. The parameter editor saves the IP variation settings in a file named <your_ip>.ip or <your_ip>.qsys.
  4. Click OK. The parameter editor appears.
  5. On the Design Example tab, select Arria 10 HDMI RX-TX Retransmit.
  6. Select Simulation to generate the testbench, and select Synthesis to generate the hardware design example.
    You must select at least one of these options to generate the design example files. If you select both, the generation time is longer.
  7. For Generate File Format, select Verilog or VHDL.
  8. For Target Development Kit, select Arria® 10 GX FPGA Development Kit. If you select a development kit, then the target device changes to match the device on target board. For Arria® 10 GX FPGA Development Kit, the default device is 10AX115S2F45I1SG.
  9. Click Generate Example Design.
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