Visible to Intel only — GUID: rbf1648773162363
Ixiasoft
Visible to Intel only — GUID: rbf1648773162363
Ixiasoft
6. Configuration Registers Overview
The F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP reconfiguration soft CSR registers are used for switching between the Reconfiguration subset modes available within the same Reconfiguration group. If you are dynamically changing the fracture settings during run time, you must write and update these reconfiguration soft CSR registers to ensure a successful dynamic reconfiguration process.
To enable the F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR and F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP reconfiguration soft CSR registers, you must select the Enable datapath Avalon interface, Enable soft CSR and Enable reconfiguration soft CSR parameters in the Datapath Avalon memory-mapped interface section of the F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP core.