4.3.2. FPGA RX Settings
You must use a redriver on the PCB panel to ensure compliance to RX CTS and HDMI 2.1 cable loss. Intel products do not support non-compliant cables. The equalization is dependent on overall system reach design; in a typical scenario, 16 dB is sufficient, while longer traces on larger PCB panels require higher equalization.
You can use flex cables instead of a large PCB panel for a better cost-to-performance ratio. Use link training methodology to evaluate if such cables match your setup. Validation setup uses generic jitter tolerance methodology to meet HDMI 2.1 CTS requirements.
|Insertion Loss : 20.11 dB|
|RJ||0.2 UI||1.31 ps||1.224 ps||0.12 UI|
|DJ||0.35 UI||29.2 ps||-||-|
|BUJ||0.15 UI||12.5 ps||12 ps||0.12 UI|
|SJ/PJ||0.1 UI||8.33 ps||9.33 ps||0.1 UI|
|Eye Height||100 mV||-||97.1 mV|
|Eye Weight||29.17 ps||-||31.5 ps|
The jitter (BUJ) interpretation varies. Focus on the entire system level with all components account for 1 UI budget. HDMI.org provides WCM cable that shows the cable loss parameter. The stressed signal feeds into RX to establish jitter tolerance. The following table lists the recommended settings:
|Component||Intel® Arria® 10 FPGA|| Redriver
|Adaptation Mode||Manual CTLE, TX FFE||EQ||DeEmp VOD|
|AC Gain||3||Level4||Level 0-2|
Do note that a 2 UI TX length at 6 Gbps at Test Point 1 is a mandate by HDMI 2.1 CTS.
All settings listed in this document are available in Intel® Quartus® Prime. You can update the settings to reflect the need of each design requirements as well as loss factor.
To mitigate variability in customer loss profiles:
- Isolate and confirm that the root cause is the transceiver link.
- Apply link tuning methodology.
- Refer TTK (transceiver toolkit):
- Evaluate link stability and robustness by sweeping transceiver analog settings (for loss profiles beyond nominal cases).
- Find the optimal RX analog settings with TTK.
- Apply static values in the QSF file.