Configuration via Protocol (CvP) Implementation in V-series FPGA Devices User Guide

ID 683889
Date 9/04/2020
Public
Document Table of Contents

6.3.2. Altera-defined Vendor Specific Header Register

Table 28.  Altera-defined Vendor Specific Header Register (Byte Offset: 0x204)
Bits Name Reset Value Access Description
[15:0] VSEC ID 0x1172 RO A user configurable VSEC ID.
[19:16] VSEC Revision 0 RO A user configurable VSEC revision.
[31:20] VSEC Length 0x044 RO Total length of this structure in bytes.