Summary of Cyclone® 10 LP Features
Cyclone® 10 LP Available Options
Cyclone® 10 LP Maximum Resources
Cyclone® 10 LP Package Plan
Cyclone® 10 LP I/O Vertical Migration
Logic Elements and Logic Array Blocks
Embedded Multipliers
Embedded Memory Blocks
Clocking and PLL
FPGA General Purpose I/O
Configuration
Power Management
Document Revision History for Cyclone® 10 LP Device Overview
Logic Elements and Logic Array Blocks
The LAB consists of 16 logic elements (LE) and a LAB-wide control block. An LE is the smallest unit of logic in the Cyclone® 10 LP device architecture. Each LE has four inputs, a four-input look-up table (LUT), a register, and output logic. The four-input LUT is a function generator that can implement any function with four variables.
Figure 3. Cyclone® 10 LP Device Family LEs