Embedded Multipliers
Each embedded multiplier block in Cyclone® 10 LP devices supports one individual 18 × 18-bit multiplier or two individual 9 × 9-bit multipliers. You can cascade the multiplier blocks to form wider or deeper logic structures.
You can control the operation of the embedded multiplier blocks using the following options:
- Parameterize the relevant IP cores with the Quartus® Prime parameter editor
- Infer the multipliers directly with VHDL or Verilog HDL
Altera and partners offer popular DSP IPs for Cyclone® 10 LP devices, including:
- Finite impulse response (FIR)
- Fast Fourier transform (FFT)
- Numerically controlled oscillator (NCO) functions
For a streamlined DSP design flow, the DSP Builder tool integrates the Quartus® Prime software with MathWorks Simulink and MATLAB design environments.