Streaming DMA Accelerator Functional Unit User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683840
Date 3/06/2020
Public

1.4. Acceleration Glossary

Table 3.  Acceleration Stack for Intel® Xeon® CPU with FPGAs Glossary
Term Abbreviation Description
Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Acceleration Stack

A collection of software, firmware and tools that provides performance-optimized connectivity between an Intel® FPGA and an Intel® Xeon® processor.

Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Intel® PAC with Intel® Arria® 10 GX FPGA PCIe* accelerator card with an Intel® Arria® 10. Programmable Acceleration Card is abbreviated PAC. Contains an FPGA Interface Manager (FIM) that pairs with an Intel Xeon processor over PCIe bus.
OPAE_PLATFORM_ROOT   A Linux shell environment variable set up during the process of installing the OPAE SDK delivered with the Acceleration Stack.

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