AN 500: NAND Flash Memory Interface with Altera MAX Series

ID 683829
Date 9/22/2014
Public

1.2. Implementation

These designs may be implemented using MAX II, MAX V, and MAX 10 devices. The provided design source codes target the MAX II (EPM240) and MAX 10 (10M08) respectively. These design source codes are compiled and can be programmed directly to the MAX devices.
Table 5.  Supported Flash Devices for the NAND Flash Interface DesignThis table lists the supported flash devices for the NAND Flash interface design.
Name Description
AMD NAND Flash device (Am30LV0064D)
  • A 64-Mbit mass storage device suited for high density applications in which data is sequential and requires fast write capability.
  • The initial page read access time is 7 μs with subsequent byte accesses of less than 50 ns.
Samsung NAND Flash device (K9F4008W0A)
  • A 512 K × 8-bit storage device suited for applications that do not require the high performance levels or the capacity of larger density flash memories.
  • Supports 32-byte Frame read operations with a random access time of 15 μs and a sequential access time of 120 ns.

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