1.1.3. AMD and Samsung NAND Flash Devices Commands
| Operation | Cycle 1 | Cycle 2 | Valid During Busy | Comment |
|---|---|---|---|---|
| Read data | 00h/01h | — | No | — |
| Gapless Read | 02h | — | No | Reads out data in a special high-performance mode to allow reading from multiple pages with only a 7 μs latency on the first page transfer. Superset Command supported by the AMD NAND Flash device only. |
| Read Spare Area | 50h | — | No | — |
| Read ID | 90h | — | No | — |
| Read Status | 70h | — | Yes | — |
| Input Data | 80h | — | No | Programming data into the flash array is a two step process and requires two separate command sequences to be performed. The data to be programmed must be loaded into the data registers using the Input data command sequence. After the data is loaded the Page Program command is performed to transfer the information from the data registers to the flash array. |
| Page Program | 10h | — | No | Programming data into the flash array is a two step process and requires two separate command sequences to be performed. The data to be programmed must be loaded into the data registers using the Input data command sequence. After the data is loaded the Page Program command is performed to transfer the information from the data registers to the flash array. |
| Block Erase | 60h | D0h | No | A two command procedure. In the first command cycle the address of the block to be erased is issued to the device. In the second command cycle the flash device begins the erase operation when it encounters a rising edge on the WE# signal. |
| Erase Suspend | B0h | — | Yes | Allows time critical tasks to be performed. These tasks can only be performed on the block that is not being currently erased. Superset Command supported by the AMD NAND Flash device only. |
| Erase Resume | D0h | — | No | Allows time critical tasks to be performed. These tasks can only be performed on the block that is not being currently erased. Superset Command supported by the AMD NAND Flash device only. |
| Reset | FFh | — | Yes | — |
Programming of the Flash device occurs on a Page basis (512 bytes + 16 bytes of spare area), whereas the erasure takes place on a Block basis (8 K byte + 256 bytes).
| Operation | Cycle 1 | Cycle 2 | Valid During Busy | Comment |
|---|---|---|---|---|
| Read Data | 00h | — | No | — |
| Read ID | 90h | — | No | — |
| Read Status | 70h | — | Yes | — |
| Frame Program | 80h | 10h | No | Frame Program is a two command procedure: Loading of the data that has to be programmed starts with the Frame Program setup command (80h). The Frame Program confirm command (10h) initiates the programming process. |
| Block Erase | 60h | D0h | No | Block erase is also a two command procedure: The address of the block to be erased is loaded with the Erase setup command (60h). The Flash device initiates the internal erasing process when the Erase confirm command (D0h) is loaded. |
| Reset | FFh | — | Yes | — |
Programming of the flash device takes place on a Frame basis (32 bytes), whereas the erasure takes place on a block basis (4 K byte). The device also supports partial frame programming.