Intel® Agilex™ Device Security User Guide

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ID 683823
Date 11/09/2021
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Document Table of Contents
Document Table of Contents x
1. Intel® Agilex® Device Security Overview 2. Authentication and Authorization 3. AES Bitstream Encryption 4. Device Provisioning 5. Advanced Features 6. Intel® Agilex™ Device Security User Guide Archives 7. Revision History for the Intel® Agilex® Device Security User Guide
1. Intel® Agilex® Device Security Overview x
1.1. Commitment to Product Security 1.2. Planned Security Features
1.2. Planned Security Features x
1.2.1. Physical Anti-Tamper 1.2.2. Black Key Provisioning 1.2.3. Intrinsic ID® Physically Unclonable Function (PUF) 1.2.4. Partial Reconfiguration Bitstream Security Verification
2. Authentication and Authorization x
2.1. Creating a Signature Chain 2.2. Signing a Configuration Bitstream
2.1. Creating a Signature Chain x
2.1.1. Creating Authentication Key Pairs on the Local Filesystem 2.1.2. Creating Authentication Key Pairs in SoftHSM 2.1.3. Creating the Signature Chain Root Entry 2.1.4. Creating a Signature Chain Public Key Entry
2.2. Signing a Configuration Bitstream x
2.2.1. Quartus Key File Assignment 2.2.2. Co-Signing SDM Firmware 2.2.3. Configuring Bitstream Signing Using the quartus_sign Command 2.2.4. Partial Reconfiguration Multi-Authority Support 2.2.5. Verifying Configuration Bitstream Signature Chains
3. AES Bitstream Encryption x
3.1. Creating the AES Root Key 3.2. Quartus Encryption Settings 3.3. Encrypting a Configuration Bitstream
3.3. Encrypting a Configuration Bitstream x
3.3.1. Configuration Bitstream Encryption Using the Programming File Generator Graphical Interface 3.3.2. Configuration Bitstream Encryption Using the Programming File Generator Command Line Interface 3.3.3. Partially Encrypted Configuration Bitstream Generation Using the Command Line Interface 3.3.4. Partial Reconfiguration Bitstream Encryption
4. Device Provisioning x
4.1. Using SDM Provision Firmware 4.2. Authentication Root Key Provisioning 4.3. Programming Key Cancellation ID Fuses 4.4. Canceling Root Keys 4.5. Programming Counter Fuses 4.6. Secure Data Object Service Root Key Provisioning 4.7. Security Setting Fuse Provisioning 4.8. AES Root Key Provisioning 4.9. Converting Owner Root Key, AES Root Key Certificates, and Fuse files to Jam STAPL File Formats
4.2. Authentication Root Key Provisioning x
4.2.1. Partial Reconfiguration Multi-Authority Root Key Programming
4.8. AES Root Key Provisioning x
4.8.1. AES Root Key Compact Certificate
5. Advanced Features x
5.1. Secure Debug Authorization 5.2. HPS Debug Certificates 5.3. Platform Attestation 5.4. Using Design Security Features with Remote System Update 5.5. SDM Cryptographic Services
5.5. SDM Cryptographic Services x
5.5.1. Vendor Authorized Boot 5.5.2. Secure Data Object Service 5.5.3. SDM Cryptographic Primitive Services
1. Intel® Agilex® Device Security Overview
2. Authentication and Authorization
3. AES Bitstream Encryption
4. Device Provisioning
5. Advanced Features
6. Intel® Agilex™ Device Security User Guide Archives
7. Revision History for the Intel® Agilex® Device Security User Guide

3.3.4. Partial Reconfiguration Bitstream Encryption

You can enable bitstream encryption on some  Intel® Agilex® FPGA designs that use partial reconfiguration.

Partial reconfiguration designs utilizing the Hierarchical Partial Reconfiguration (HPR) or Static Update Partial Reconfiguration (SUPR) do not support the bitstream encryption. You must use the same encryption key to encrypt the static region and all personas unless multi-authority support is enabled. If your design contains multiple PR regions, you must encrypt all personas. To enable partial reconfiguration bitstream encryption, follow the same procedure in all design revisions.

You enable partial reconfiguration bitstream encryption by selecting Assignments > Device > Device and Pin Options > Security menu. Select the desired encryption key storage location.
Figure 6. Partial Reconfiguration Bitstream Encryption Setting

After you compile your base design and revisions, the software generates a .sof file and one or more .pmsf files, representing the personas. You create encrypted and signed programming files from .sof and .pmsf files in a similar fashion to designs with no partial reconfiguration enabled.

Use the following command to convert the compiled persona .pmsf file to a partially encrypted .rbf file: 
quartus_pfg -c -o finalize_encryption_later=ON \ 
-o sign_later=ON encryption_enabled_persona1.pmsf persona1.rbf
You use the quartus_encrypt command line tool to finalize bitstream encryption. 
quartus_encrypt --family=agilex \  
--operation=ENCRYPT --key=aes_root.qek persona1.rbf encrypted_persona1.rbf
You use the quartus_sign command line tool to sign the encrypted configuration bitstream. 
quartus_sign --family=agilex --operation=SIGN \ 
--qky=design0_sign_chain.qky \ 
--pem=design0_sign_private.pem encrypted_persona1.rbf \ 
signed_encrypted_persona1.rbf 
quartus_sign --family=agilex--operation=SIGN \ 
--module=softHSM --module_args="--token_label=agilex-token \
--user_pin=agilex-token-pin --hsm_lib=/usr/local/lib/softhsm/libsofthsm2.so" \
--qky=design0_sign_chain.qky --cancel=svnA:0 \
--pem=design0_sign encrypted_persona1.rbf signed_encrypted_persona1.rbf
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