Intel® Agilex™ Device Security User Guide

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ID 683823
Date 11/09/2021
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Document Table of Contents
Document Table of Contents x
1. Intel® Agilex® Device Security Overview 2. Authentication and Authorization 3. AES Bitstream Encryption 4. Device Provisioning 5. Advanced Features 6. Intel® Agilex™ Device Security User Guide Archives 7. Revision History for the Intel® Agilex® Device Security User Guide
1. Intel® Agilex® Device Security Overview x
1.1. Commitment to Product Security 1.2. Planned Security Features
1.2. Planned Security Features x
1.2.1. Physical Anti-Tamper 1.2.2. Black Key Provisioning 1.2.3. Intrinsic ID® Physically Unclonable Function (PUF) 1.2.4. Partial Reconfiguration Bitstream Security Verification
2. Authentication and Authorization x
2.1. Creating a Signature Chain 2.2. Signing a Configuration Bitstream
2.1. Creating a Signature Chain x
2.1.1. Creating Authentication Key Pairs on the Local Filesystem 2.1.2. Creating Authentication Key Pairs in SoftHSM 2.1.3. Creating the Signature Chain Root Entry 2.1.4. Creating a Signature Chain Public Key Entry
2.2. Signing a Configuration Bitstream x
2.2.1. Quartus Key File Assignment 2.2.2. Co-Signing SDM Firmware 2.2.3. Configuring Bitstream Signing Using the quartus_sign Command 2.2.4. Partial Reconfiguration Multi-Authority Support 2.2.5. Verifying Configuration Bitstream Signature Chains
3. AES Bitstream Encryption x
3.1. Creating the AES Root Key 3.2. Quartus Encryption Settings 3.3. Encrypting a Configuration Bitstream
3.3. Encrypting a Configuration Bitstream x
3.3.1. Configuration Bitstream Encryption Using the Programming File Generator Graphical Interface 3.3.2. Configuration Bitstream Encryption Using the Programming File Generator Command Line Interface 3.3.3. Partially Encrypted Configuration Bitstream Generation Using the Command Line Interface 3.3.4. Partial Reconfiguration Bitstream Encryption
4. Device Provisioning x
4.1. Using SDM Provision Firmware 4.2. Authentication Root Key Provisioning 4.3. Programming Key Cancellation ID Fuses 4.4. Canceling Root Keys 4.5. Programming Counter Fuses 4.6. Secure Data Object Service Root Key Provisioning 4.7. Security Setting Fuse Provisioning 4.8. AES Root Key Provisioning 4.9. Converting Owner Root Key, AES Root Key Certificates, and Fuse files to Jam STAPL File Formats
4.2. Authentication Root Key Provisioning x
4.2.1. Partial Reconfiguration Multi-Authority Root Key Programming
4.8. AES Root Key Provisioning x
4.8.1. AES Root Key Compact Certificate
5. Advanced Features x
5.1. Secure Debug Authorization 5.2. HPS Debug Certificates 5.3. Platform Attestation 5.4. Using Design Security Features with Remote System Update 5.5. SDM Cryptographic Services
5.5. SDM Cryptographic Services x
5.5.1. Vendor Authorized Boot 5.5.2. Secure Data Object Service 5.5.3. SDM Cryptographic Primitive Services
1. Intel® Agilex® Device Security Overview
2. Authentication and Authorization
3. AES Bitstream Encryption
4. Device Provisioning
5. Advanced Features
6. Intel® Agilex™ Device Security User Guide Archives
7. Revision History for the Intel® Agilex® Device Security User Guide

1.2.1. Physical Anti-Tamper

Physical anti-tamper features help detect and respond to certain physical attacks on silicon.
The SDM monitors operating conditions such as input clocks, voltage, and temperature to detect device tampering. Changes in these conditions may indicate a tampering event. You can choose an appropriate response to a detected event. Possible responses include but are not limited to the following actions:
  • Device lock
  • Device lock with configuration data zeroization
  • Device lock with configuration data zeroization and BBRAM key erasure

You enable the physical anti-tamper features during the design process. The Intel® Agilex™ device activates the anti-tamper features as a configuration bitstream is loaded.

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