Intel® Agilex™ Device Security User Guide

ID 683823
Date 11/09/2021
Public

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5.2. HPS Debug Certificates

To enable only authorized access to the HPS debug access port (DAP) via JTAG interface, you click the Intel® Quartus® Prime Assignments menu and select Device > Device and Pin Options > Configuration tab, then enable the HPS debug access port (DAP) by selecting either HPS Pins or SDM Pins from the drop down menu, and ensuring the Allow HPS debug without certificates checkbox is not selected.
Figure 7. Specify Either HPS or SDM Pins for the HPS DAP

You then compile and load the design with these settings.

You create a signature chain with the appropriate permissions to sign an HPS debug certificate.
quartus_sign --family=agilex --operation=append_key \ 
--previous_pem=root_private.pem --previous_qky=root.qky \ 
--permission=0x8 --cancel=1 \ 
hps_debug_cert_public_key.pem hps_debug_cert_sign_chain.qky  
You use the Intel® Quartus® Prime Programmer to request an unsigned HPS debug certificate from the device where the debug design is loaded.
quartus_pgm -c 1 -m jtag -o “e;unsigned_hps_debug.cert;AGFB014R24A”
You sign the unsigned HPS debug certificate using the quartus_sign tool or reference implementation and the HPS debug signature chain.
quartus_sign --family=agilex --operation=sign \  
--qky=hps_debug_cert_sign_chain.qky \  
--pem=hps_debug_cert_private_key.pem \  
unsigned_hps_debug.cert signed_hps_debug.cert 
You use the Intel® Quartus® Prime Programmer to send the signed HPS debug certificate back to the device to enable access to the HPS DAP.
quartus_pgm -c 1 -m jtag -o “p;signed_hps_debug.cert"

The HPS debug certificate is only valid from the time it was generated until the next power cycle of the device or until a different type or version of SDM firmware is loaded. You must generate, sign, and program the signed HPS debug certificate, and perform all debug operations, prior to power cycling the device. You may invalidate the signed HPS debug certificate by power cycling the device.

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