AN 630: Real-Time ISP and ISP Clamp for Intel® MAX® Series Devices

ID 683786
Date 5/27/2022
Public

Defining the Pin States in Assignment Editor

Alternatively, you can define the pin states with the Assignment Editor and compile the design. The generated programming file will have all the pin state information.

To define the pin states with the Assignment Editor, follow these steps:

  1. Click Start Analysis and Synthesis on the toolbar.
  2. On the Assignments menu, click Assignment Editor.
  3. In the Category list, select I/O Features.
  4. In the To column, specify the pins that you want to clamp when the device is in ISP clamp mode. Use the Node Finder to help you select the pins.
  5. Select In-System Programming Clamp State for all the pins in the Assignment Name column after you have specified the pins that you want to set state values.
  6. In the Value column, specify the state for each pin. You can select to clamp the pins to high, low, tri-state, or to sample and sustain the pin state. By default, the pins are tri-stated when the device enters ISP clamp mode.
  7. Save the assignments and recompile your design.

Note: After you recompile the design, the ISP clamp state information is stored in the .pof. You can also view the settings in the Intel® Quartus® Prime Settings File (.qsf).

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