Intel® Cyclone® 10 GX Native Fixed Point DSP IP Core User Guide

ID 683739
Date 11/06/2017

2. Getting Started

This chapter provides a general overview of the Intel® FPGA IP core design flow to help you quickly get started with the Cyclone® 10 GX Native Fixed Point DSP IP core. The Intel® FPGA IP Library is installed as part of the Intel® Quartus® Prime installation process. You can select and parameterize any Intel® FPGA IP core from the library. Intel® provides an integrated parameter editor that allows you to customize the Intel® FPGA DSP IP core to support a wide variety of applications. The parameter editor guides you through the setting of parameter values and selection of optional ports.

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